While booting with dt blob, if fdt_high is not set to
0xffffffff, the dt blob gets relocated to a high ram address,
which the kernel is not able to use without HIGHMEM.
So set it to 0xffffffff to avoid the issue.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
The omap5-uevm is the reference board name for OMAP5 soc
based platform. So rename it accordingly.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
The function get_timer() should return time in ms and CONFIG_SYS_HZ
should be set to 1000 by default. Fix both of these items.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
The omap2420-h4 board is using a RAM based address as the linker
location for code. This is causing several problems when attempting
to run the latest u-boot code base on this board from flash. Update
the default linker location for code to be in NOR flash. Please note
that OMAP maps the NOR flash to address 0x08000000 by default and so
use this as the default address for the NOR flash.
Also remove legacy code that attempts to calculate where in flash the
sdata structure, that holds the memory interface configuration data,
is located. By changing the default linker location for code to flash
this is no longer necessary.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
The size of the DRAM for the omap2420-h4 board is getting setup in the
dram_init() function. However, for the current u-boot release this is
too late and needs to be done in dram_init_banksize(). Therefore, add
a dram_init_banksize() function for the omap2420-h4 board and setup the
DRAM size there.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
The kernel states:
---8<---
The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not
provide automatic error location and correction: this step is implemented using
the BCH library.
--->8---
And we do so in u-boot.
This implementation uses the same layout for BCH8 but it is fix. The current
provided layout does only work with 64 Byte OOB.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Mansoor Ahamed <mansoor.ahamed@ti.com>
Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
With uppcoming BCH support on OMAP devices we need to decide between differnt
algorithms when switching the ECC engine. Currently we support 1-bit hammign
and 8-bit BCH on HW backend.
In order to switch between differnet ECC algorithms we need to change the
interface of omap_nand_switch_ecc() also.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
This patch adds BCH8 ooblayout for NAND as provided by
0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is
currently only provided for 64 byte OOB.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
Reviewed-by: Tom Rini <trini@ti.com>
arch/arm/include/asm/arch-am33xx/omap_gpmc.h and
arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate
the common parts into a new header.
Introduce a new asm/omap_gpmc.h which defines the command part and pulls in
the architecture specific one.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
This patch adds the BCH result registers to register mapping for OMAP3 gpmc.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
Reviewed-by: Tom Rini <trini@ti.com>
Flush UART3 xmit on enable if TEMT is broken
On some OMAP3 devices when UART3 is configured for boot mode before SPL starts
only THRE bit is set. We have to empty the transmitter before initialization
starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT.
Signed-off-by: Manfred Huber <man.huber@arcor.de>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
We must not assume ROM has enabled the clock for MMC1.
Reported-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
This is done already for am335x in
59dcf970d1 and also applies for pcm051.
It powers down the IO receiver when not performing read which helps
reducing the overall power consuption in low power states
(suspend/standby).
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Do not config MUSB to highspeed mode if CONFIG_USB_GADGET_DUALSPEED
is not set, in which case Ether gadget only operates in fullspeed.
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
On TI AM335x devices, MUSB has bulk split/combine feature enabled
in the ConfigData register, but the current MUSB driver does not
support it yet. Therefore, disable the feature for now, until the
driver adds the support.
One usecase which is broken because of this feature is that Ether
gadget stops working in Fullspeed mode (by un-defining
CONFIG_USB_GADGET_DUALSPEED)
After desabled this feature, MUSB driver send packets in proper size
(no more than 64 bytes) in Fullspeed mode.
This has been validated with Ether gadget in Fullspeed mode on AM335x
EVM.
Signed-off-by: Bin Liu <b-liu@ti.com>
Atmel change to new logo since 2012. This patch update the logo to new one.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Wolfgang requested this be reverted and Rob agreed after further
discussion. This was a symptom of a larger problem we need to deal
with.
This reverts commit 60d7d5a631.
Signed-off-by: Tom Rini <trini@ti.com>
This tool handles building U-Boot to check that you have not broken it
with your patch series. It can build each individual commit and report
which boards fail on which commits, and which errors come up. It also
shows differences in image sizes due to particular commits.
Buildman aims to make full use of multi-processor machines.
Documentation and caveats are in tools/buildman/README.
Signed-off-by: Simon Glass <sjg@chromium.org>
These tags are used by Gerrit, so let's ignore all of them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
A few of the help messages are not quite right, and there is a typo
in the README. Fix these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
This comment is less than helpful. Since multiple tags are supported, add
an example of how multiple tags work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
At present something like:
Revert "arm: Add cache operations"
will try to use
Revert "arm
as a tag. Clearly this is wrong, so fix it.
If the revert is intended to be tagged, then the tag can come before
the revert, perhaps. Alternatively the 'Cc' tag can be used in the commit
messages.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
checkpatch has a new type of warning, a 'CHECK'. At present patman fails
with these, which makes it less than useful.
Add support for checks, making it backwards compatible with the old
checkpatch.
At the same time, clean up formatting of the CheckPatches() output,
fix erroneous "internal error" if multiple patches have warnings and
be more robust to new types of problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
The cover letter is sent to everyone who is on the Cc list for any of
the patches in the series. Sometimes it is useful to send just the cover
letter to additional people, so that they are aware of the series, but
don't need to wade through all the individual patches.
Add a new Cover-letter-cc tag for this purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Some versions of git don't seem to prompt you for the message ID that
your series is in reply to. Allow specifying this from the command
line.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Although "Reviewed-by:" is a tag that gerrit adds, it's also a tag
used by upstream. Stripping it is undesirable. In fact, we should
treat it as important.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Simon Glass <sjg@chromium.org>
We normally read from the current branch, but buildman will need to look
at commits from another branch. Allow the metadata to be read from any
list of commits, to provide this flexibility.
Signed-off-by: Simon Glass <sjg@chromium.org>
Make raise_on_error a parameter so that we can control which commands
raise and which do not. If we get an error reading the alias file, just
continue.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than returning a list of things, return an object. That makes it
easier to access the returned items, and easier to extend the return
value later.
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds a new library on top of subprocess which permits access to
the subprocess output as it is being generated. We can therefore
give the illusion that a process is running independently, but still
monitor its output so that we know what is going on.
It is possible to display output on a terminal as it is generated
(a little like tee). The supplied output function is called with all
stdout/stderr data as it arrives.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than the rather dull colours, use bright versions which normally
look better and are easier to read.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is easy to detect whether or not the process is connected to a terminal,
or piped to a file. Disable ANSI colours automatically when output is
not to a terminal.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewing the ECSPI reset handling shows two issues:
1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg
(ECSPIx_CONGREG) the i.MX6 technical reference manual states:
-- cut --
ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block
and resets the internal logic with the exception of the ECSPI_CONREG.
-- cut --
Note the exception mentioned: The CONREG itself isn't reset.
Fix this by manually writing the reset value 0 to the whole register.
This sets the EN bit to zero, too (i.e. includes the old
~MXC_CSPICTRL_EN).
2. We want to reset the whole SPI block here. So it makes no sense
to first read the old value of the CONREG and write it back, later.
This will give us the old (historic/random) value of the CONREG back.
And doesn't reset the CONREG.
To get a clean CONREG after the reset of the block, too, don't use
the old (historic/random) value of the CONREG while doing the reset.
And read the clean CONREG after the reset.
This was found while working on a SPI boot device where the i.MX6 boot
ROM has already initialized the SPI block. The initialization by the
boot ROM might be different to what the U-Boot driver wants to configure.
I.e. we need a clean reset of SPI block, including the CONREG.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer
driver to conform to this.
Have the timer implementation export a custom API get_timer_us() for use
by the BCM2835 MMC API, which needs us resolution for a HW workaround.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
This fixes this build warning:
Configuring for qemu_mips64 - Board: qemu-mips64, Options: SYS_BIG_ENDIAN
text data bss dec hex filename
215344 13082 218720 447146 6d2aa qemu_mips64/u-boot
cfi_flash.c: In function 'flash_map':
cfi_flash.c:217:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
board/freescale/mx6qsabrelite/README explain a procedure to
update the SPI-NOR on the SabreLite board without Freescale
manufacturing tool but following this procedure leads to both
"sf erase" and "sf write" failing on a mx6qsabrelite board:
MX6QSABRELITE U-Boot > sf probe 1
MX6QSABRELITE U-Boot > sf erase 0 0x40000
SPI flash erase failed
MX6QSABRELITE U-Boot > sf write 0x10800000 0 0x40000
SPI flash write failed
This is because the chip-select 1 is wrong and the correct
value is 0x7300.
Since commit c1173bd0 ("sf command: allow default bus and chip selects")
the chip-select and bus arguments for the sf probe command are optional
so let's just remove it and use "sf probe" instead.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
CONFIG_SYS_FSL_USDHC_NUM is not used for wandboard.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev()
returns 0x62xxx, which is not a value understood by the VPU
(Video Processing Unit) library in the kernel and causes the video playback to
fail.
The expected values for get_board_rev are:
0x63xxx: For mx6quad/dual
0x61xxx: For mx6dual-lite/solo
So adjust get_board_rev() accordingly and make it as weak function, so that we
do not need to define it in every mx6 board file.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
The netargs variable was referencing the non-existing variable
console_mainline. Change that to console variable instead.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Maximum bus width supported by some i.MX6 boards is not 8bit like
others. In case where both host controller and card support 8bit transfers,
they agree to communicate on 8bit interface while some boards support only 4bit interface.
Due to this reason the mmc 8bit default mode fails on these boards. To rectify this,
define maximum bus width supported by these boards (4bit). If max_bus_width is not
defined, it is 0 by default and 8bit width support will be enabled in host
capabilities otherwise host capabilities are modified accordingly.
It is tested with a MMCplus card.
Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com>
cc: stefano Babic <sbabic@denx.de>
cc: Andy Fleming <afleming@gmail.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
SRICHARAN R
Hunter, Jon
Andreas Bießmann
Manfred Huber
Tom Rini
Lars Poeschel
Bin Liu
Josh Wu
Simon Glass
Doug Anderson
Albert ARIBAUD
Minkyu Kang
Dirk Behme
Stephen Warren
Stefan Roese
Javier Martinez Canillas
Fabio Estevam
Alexandre Pereira da Silva
Abbas Raza