ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this. Have the timer implementation export a custom API get_timer_us() for use by the BCM2835 MMC API, which needs us resolution for a HW workaround. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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@ -23,7 +23,7 @@ int timer_init(void)
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return 0;
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}
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ulong get_timer(ulong base)
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ulong get_timer_us(ulong base)
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{
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struct bcm2835_timer_regs *regs =
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(struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR;
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@ -31,6 +31,14 @@ ulong get_timer(ulong base)
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return readl(®s->clo) - base;
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}
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ulong get_timer(ulong base)
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{
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ulong us = get_timer_us(0);
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us /= (1000000 / CONFIG_SYS_HZ);
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us -= base;
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return us;
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}
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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@ -46,10 +54,10 @@ void __udelay(unsigned long usec)
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ulong endtime;
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signed long diff;
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endtime = get_timer(0) + usec;
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endtime = get_timer_us(0) + usec;
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do {
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ulong now = get_timer(0);
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ulong now = get_timer_us(0);
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diff = endtime - now;
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} while (diff >= 0);
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}
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@ -34,4 +34,6 @@ struct bcm2835_timer_regs {
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#define BCM2835_TIMER_CS_M1 (1 << 1)
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#define BCM2835_TIMER_CS_M0 (1 << 0)
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extern ulong get_timer_us(ulong base);
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#endif
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@ -39,6 +39,7 @@
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#include <common.h>
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#include <malloc.h>
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#include <sdhci.h>
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#include <asm/arch/timer.h>
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/* 400KHz is max freq for card ID etc. Use that as min */
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#define MIN_FREQ 400000
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@ -67,11 +68,11 @@ static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val,
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* (Which is just as well - otherwise we'd have to nobble the DMA engine
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* too)
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*/
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while (get_timer(bcm_host->last_write) < bcm_host->twoticks_delay)
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while (get_timer_us(bcm_host->last_write) < bcm_host->twoticks_delay)
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;
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writel(val, host->ioaddr + reg);
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bcm_host->last_write = get_timer(0);
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bcm_host->last_write = get_timer_us(0);
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}
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static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg)
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@ -31,7 +31,7 @@
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#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
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/* Timer */
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#define CONFIG_SYS_HZ 1000000
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#define CONFIG_SYS_HZ 1000
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/* Memory layout */
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#define CONFIG_NR_DRAM_BANKS 1
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