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ARM: DRA7: leave control module unlocked 

Locking control_core_mmr_lock1 register results in regions 0x00000100
to 0x0000079F locked out(includes key registers for bandgap etc). This
means that any write accesses will fail to reflect results without a
clear notification.

So, leave the control module unlocked.

TODO: SPL should reflect consistent behavior for entire Control module
space which includes LOCK_1-5 regions left open -> if this is done,
this should be implemented in a generic location independent of the
current logic.

Reported-by: Yan Liu <yan-liu@ti.com>
Reported-by: Mugunthan V <mugunthanvnm@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Nishanth Menon 2014-02-03 15:45:03 -06:00 committed by Tom Rini
parent fe19bcd47f
commit 2a5788adc4
1 changed files with 2 additions and 3 deletions
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5
arch/arm/cpu/armv7/omap5/hw_data.c
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@ -359,11 +359,10 @@ void recalibrate_io_delay(void)
clrsetbits_le32((*prcm)->prm_io_pmctrl, (1 << 0), 0x0);
/* Lock the MMR_LOCK1 */
writel(0x1A1C8144, (*ctrl)->control_core_mmr_lock1);
/* Lock the global lock to write to the MMRs */
writel(0x0000AAAB, (*ctrl)->iodelay_config_reg_8);
/* Leave the control module unlocked */
}
#endif /* CONFIG_SPL_BUILD */