Sricharan R 861e94936c ARM: DRA: Fix period calculation in iodelay recalib sequence ... A divider of 5 is required to get the right period value to be set for a given sysclk frequency. This is a fixed-constant for all sysclks. Signed-off-by: Sricharan R <r.sricharan@ti.com>		2014-02-04 08:59:59 -05:00
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cpu	ARM: DRA: Fix period calculation in iodelay recalib sequence	2014-02-04 08:59:59 -05:00
dts	Merge branch 'next' of git://git.denx.de/u-boot-usb into ti-u-boot-2013.10	2013-10-16 17:39:00 -04:00
imx-common	Merge git://git.denx.de/u-boot-arm	2013-07-31 11:30:38 +02:00
include/asm	ARM: DRA: Add io recalibration delay sequence	2014-01-31 14:20:30 -05:00
lib	ARM: AM4372: Enable caches at starting of u-boot	2013-10-21 13:10:42 -04:00
config.mk	Makefile: Introduce ARCH_PLATFORM_LIBGCC variable	2013-10-16 16:43:08 -04:00