arm: use common instructions applicable to armv7m & other arm archs
This patch cleans the code by using instructions allowed for armv7m as well as other Arm archs. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
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@ -71,18 +71,12 @@ ENTRY(_main)
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*/
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*/
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
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ldr sp, =(CONFIG_SPL_STACK)
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ldr r0, =(CONFIG_SPL_STACK)
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#else
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#else
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ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
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ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
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#endif
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#endif
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#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */
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bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
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mov r3, sp
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mov sp, r0
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bic r3, r3, #7
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mov sp, r3
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#else
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bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
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#endif
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mov r0, sp
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bl board_init_f_alloc_reserve
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bl board_init_f_alloc_reserve
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mov sp, r0
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mov sp, r0
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/* set up gd here, outside any C code */
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/* set up gd here, outside any C code */
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@ -100,14 +94,9 @@ ENTRY(_main)
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* 'here' but relocated.
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* 'here' but relocated.
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*/
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*/
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ldr sp, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
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ldr r0, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
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#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */
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bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
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mov r3, sp
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mov sp, r0
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bic r3, r3, #7
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mov sp, r3
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#else
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bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
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#endif
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ldr r9, [r9, #GD_BD] /* r9 = gd->bd */
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ldr r9, [r9, #GD_BD] /* r9 = gd->bd */
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sub r9, r9, #GD_SIZE /* new GD is below bd */
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sub r9, r9, #GD_SIZE /* new GD is below bd */
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