clk: zynq: Add optional ethernet emio clock source support
Add support for the optional ethernet emio clock source to the zynq clock framework driver. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -48,6 +48,9 @@ enum zynq_clk_rclk {mio_clk, emio_clk};
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struct zynq_clk_priv {
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struct zynq_clk_priv {
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ulong ps_clk_freq;
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ulong ps_clk_freq;
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#ifndef CONFIG_SPL_BUILD
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struct clk gem_emio_clk[2];
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#endif
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};
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};
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static void *zynq_clk_get_register(enum zynq_clk id)
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static void *zynq_clk_get_register(enum zynq_clk id)
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@ -267,9 +270,15 @@ static ulong zynq_clk_get_peripheral_rate(struct zynq_clk_priv *priv,
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#ifndef CONFIG_SPL_BUILD
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#ifndef CONFIG_SPL_BUILD
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static ulong zynq_clk_get_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id)
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static ulong zynq_clk_get_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id)
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{
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{
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struct clk *parent;
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if (zynq_clk_get_gem_rclk(id) == mio_clk)
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if (zynq_clk_get_gem_rclk(id) == mio_clk)
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return zynq_clk_get_peripheral_rate(priv, id, true);
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return zynq_clk_get_peripheral_rate(priv, id, true);
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parent = &priv->gem_emio_clk[id - gem0_clk];
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if (parent->dev)
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return clk_get_rate(parent);
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debug("%s: gem%d emio rx clock source unknown\n", __func__,
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debug("%s: gem%d emio rx clock source unknown\n", __func__,
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id - gem0_clk);
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id - gem0_clk);
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@ -340,9 +349,15 @@ static ulong zynq_clk_set_peripheral_rate(struct zynq_clk_priv *priv,
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static ulong zynq_clk_set_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id,
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static ulong zynq_clk_set_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id,
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ulong rate)
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ulong rate)
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{
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{
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struct clk *parent;
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if (zynq_clk_get_gem_rclk(id) == mio_clk)
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if (zynq_clk_get_gem_rclk(id) == mio_clk)
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return zynq_clk_set_peripheral_rate(priv, id, rate, true);
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return zynq_clk_set_peripheral_rate(priv, id, rate, true);
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parent = &priv->gem_emio_clk[id - gem0_clk];
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if (parent->dev)
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return clk_set_rate(parent, rate);
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debug("%s: gem%d emio rx clock source unknown\n", __func__,
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debug("%s: gem%d emio rx clock source unknown\n", __func__,
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id - gem0_clk);
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id - gem0_clk);
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@ -436,6 +451,20 @@ static struct clk_ops zynq_clk_ops = {
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static int zynq_clk_probe(struct udevice *dev)
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static int zynq_clk_probe(struct udevice *dev)
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{
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{
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struct zynq_clk_priv *priv = dev_get_priv(dev);
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struct zynq_clk_priv *priv = dev_get_priv(dev);
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#ifndef CONFIG_SPL_BUILD
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unsigned int i;
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char name[16];
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int ret;
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for (i = 0; i < 2; i++) {
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sprintf(name, "gem%d_emio_clk", i);
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ret = clk_get_by_name(dev, name, &priv->gem_emio_clk[i]);
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if (ret < 0 && ret != -FDT_ERR_NOTFOUND) {
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dev_err(dev, "failed to get %s clock\n", name);
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return ret;
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}
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}
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#endif
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priv->ps_clk_freq = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
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priv->ps_clk_freq = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
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"ps-clk-frequency", 33333333UL);
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"ps-clk-frequency", 33333333UL);
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