mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP
Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
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@ -38,6 +38,8 @@
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#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
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#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
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#define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
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#define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
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#define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
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u32 get_nr_cpus(void);
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u32 get_nr_cpus(void);
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u32 get_cpu_rev(void);
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u32 get_cpu_rev(void);
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u32 get_cpu_speed_grade_hz(void);
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u32 get_cpu_speed_grade_hz(void);
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@ -29,6 +29,12 @@
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#ifdef CONFIG_MX7
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#ifdef CONFIG_MX7
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#define BM_CTRL_ADDR 0x0000000f
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#define BM_CTRL_ADDR 0x0000000f
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#define BM_CTRL_RELOAD 0x00000400
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#define BM_CTRL_RELOAD 0x00000400
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#elif defined(CONFIG_MX7ULP)
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#define BM_CTRL_ADDR 0x000000FF
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#define BM_CTRL_RELOAD 0x00000400
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#define BM_OUT_STATUS_DED 0x00000400
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#define BM_OUT_STATUS_LOCKED 0x00000800
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#define BM_OUT_STATUS_PROGFAIL 0x00001000
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#else
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#else
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#define BM_CTRL_ADDR 0x0000007f
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#define BM_CTRL_ADDR 0x0000007f
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#endif
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#endif
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@ -70,6 +76,9 @@
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#elif defined CONFIG_MX7
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#elif defined CONFIG_MX7
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#define FUSE_BANK_SIZE 0x40
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#define FUSE_BANK_SIZE 0x40
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#define FUSE_BANKS 16
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#define FUSE_BANKS 16
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#elif defined(CONFIG_MX7ULP)
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#define FUSE_BANK_SIZE 0x80
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#define FUSE_BANKS 31
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#else
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#else
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#error "Unsupported architecture\n"
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#error "Unsupported architecture\n"
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#endif
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#endif
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@ -98,7 +107,7 @@ u32 fuse_bank_physical(int index)
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{
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{
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u32 phy_index;
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u32 phy_index;
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if (is_mx6sl()) {
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if (is_mx6sl() || is_mx7ulp()) {
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phy_index = index;
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phy_index = index;
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} else if (is_mx6ul() || is_mx6ull() || is_mx6sll()) {
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} else if (is_mx6ul() || is_mx6ull() || is_mx6sll()) {
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if ((is_mx6ull() || is_mx6sll()) && index == 8)
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if ((is_mx6ull() || is_mx6sll()) && index == 8)
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@ -187,6 +196,10 @@ static int finish_access(struct ocotp_regs *regs, const char *caller)
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err = !!(readl(®s->ctrl) & BM_CTRL_ERROR);
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err = !!(readl(®s->ctrl) & BM_CTRL_ERROR);
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clear_error(regs);
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clear_error(regs);
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#ifdef CONFIG_MX7ULP
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/* Need to power down the OTP memory */
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writel(1, ®s->pdn);
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#endif
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if (err) {
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if (err) {
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printf("mxc_ocotp %s(): Access protect error\n", caller);
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printf("mxc_ocotp %s(): Access protect error\n", caller);
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return -EIO;
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return -EIO;
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@ -217,6 +230,13 @@ int fuse_read(u32 bank, u32 word, u32 *val)
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*val = readl(®s->bank[phy_bank].fuse_regs[phy_word << 2]);
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*val = readl(®s->bank[phy_bank].fuse_regs[phy_word << 2]);
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#ifdef CONFIG_MX7ULP
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if (readl(®s->out_status) & BM_OUT_STATUS_DED) {
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writel(BM_OUT_STATUS_DED, ®s->out_status_clr);
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printf("mxc_ocotp %s(): fuse read wrong\n", __func__);
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return -EIO;
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}
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#endif
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return finish_access(regs, __func__);
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return finish_access(regs, __func__);
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}
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}
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@ -238,6 +258,12 @@ static void set_timing(struct ocotp_regs *regs)
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clrsetbits_le32(®s->timing, BM_TIMING_FSOURCE | BM_TIMING_PROG,
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clrsetbits_le32(®s->timing, BM_TIMING_FSOURCE | BM_TIMING_PROG,
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timing);
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timing);
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}
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}
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#elif defined(CONFIG_MX7ULP)
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static void set_timing(struct ocotp_regs *regs)
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{
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/* No timing set for MX7ULP */
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}
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#else
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#else
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static void set_timing(struct ocotp_regs *regs)
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static void set_timing(struct ocotp_regs *regs)
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{
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{
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@ -302,6 +328,14 @@ int fuse_sense(u32 bank, u32 word, u32 *val)
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*val = readl(®s->read_fuse_data);
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*val = readl(®s->read_fuse_data);
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#endif
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#endif
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#ifdef CONFIG_MX7ULP
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if (readl(®s->out_status) & BM_OUT_STATUS_DED) {
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writel(BM_OUT_STATUS_DED, ®s->out_status_clr);
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printf("mxc_ocotp %s(): fuse read wrong\n", __func__);
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return -EIO;
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}
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#endif
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return finish_access(regs, __func__);
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return finish_access(regs, __func__);
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}
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}
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@ -355,6 +389,14 @@ int fuse_prog(u32 bank, u32 word, u32 val)
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#endif
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#endif
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udelay(WRITE_POSTAMBLE_US);
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udelay(WRITE_POSTAMBLE_US);
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#ifdef CONFIG_MX7ULP
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if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) {
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writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr);
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printf("mxc_ocotp %s(): fuse write is failed\n", __func__);
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return -EIO;
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}
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#endif
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return finish_access(regs, __func__);
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return finish_access(regs, __func__);
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}
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}
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@ -374,5 +416,13 @@ int fuse_override(u32 bank, u32 word, u32 val)
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writel(val, ®s->bank[phy_bank].fuse_regs[phy_word << 2]);
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writel(val, ®s->bank[phy_bank].fuse_regs[phy_word << 2]);
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#ifdef CONFIG_MX7ULP
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if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) {
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writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr);
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printf("mxc_ocotp %s(): fuse write is failed\n", __func__);
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return -EIO;
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}
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#endif
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return finish_access(regs, __func__);
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return finish_access(regs, __func__);
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}
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}
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