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x86: Intel MID platforms has no microcode update 

There is no microcode update available for SoCs used on Intel MID
platforms.

Use conditional to bypass it.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
This commit is contained in:
Andy Shevchenko 2017-02-17 16:49:00 +03:00 committed by Bin Meng
parent 20bfac0599
commit 308c75e08d
1 changed files with 2 additions and 1 deletions
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3
arch/x86/cpu/mp_init.c
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@ -248,7 +248,8 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus)
if (!stack)
return -ENOMEM;
params->stack_top = (u32)(stack + size);
#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && \
!defined(CONFIG_INTEL_MID)
params->microcode_ptr = ucode_base;
debug("Microcode at %x\n", params->microcode_ptr);
#endif