ARM: imx6: add initial support for Nitrogen6X boards
Only the 1GB variant is supported for now, as I don't have anything other to test with. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Lucas Stach
Sascha Hauer
parent
c06522e88e
commit
3c3e99d6ac
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@ -12,6 +12,7 @@ obj-$(CONFIG_MACH_AT91SAM9N12EK) += at91sam9n12ek/
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obj-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek/
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obj-$(CONFIG_MACH_BEAGLE) += beagle/
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obj-$(CONFIG_MACH_BEAGLEBONE) += beaglebone/
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obj-$(CONFIG_MACH_NITROGEN6X) += boundarydevices-nitrogen6x/
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obj-$(CONFIG_MACH_CCMX51) += ccxmx51/
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obj-$(CONFIG_MACH_CFA10036) += crystalfontz-cfa10036/
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obj-$(CONFIG_MACH_CHUMBY) += chumby_falconwing/
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@ -0,0 +1,3 @@
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obj-y += board.o flash-header-nitrogen6x-1g.dcd.o
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extra-y += flash-header-nitrogen6x-1g.dcd.S flash-header-nitrogen6x-1g.dcd
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lwl-y += lowlevel.o
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@ -0,0 +1,77 @@
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/*
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* Copyright (C) 2014 Lucas Stach, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <init.h>
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#include <environment.h>
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#include <mach/bbu.h>
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#include <linux/phy.h>
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#include <linux/micrel_phy.h>
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#include <mach/imx6.h>
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static int nitrogen6x_devices_init(void)
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{
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if (!of_machine_is_compatible("fsl,imx6dl-nitrogen6x") &&
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!of_machine_is_compatible("fsl,imx6q-nitrogen6x"))
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return 0;
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imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0.barebox",
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BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0);
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return 0;
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}
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device_initcall(nitrogen6x_devices_init);
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static int ksz9021rn_phy_fixup(struct phy_device *dev)
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{
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phy_write(dev, 0x09, 0x0f00);
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/* do same as linux kernel */
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/* min rx data delay */
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phy_write(dev, 0x0b, 0x8105);
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phy_write(dev, 0x0c, 0x0000);
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/* max rx/tx clock delay, min rx/tx control delay */
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phy_write(dev, 0x0b, 0x8104);
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phy_write(dev, 0x0c, 0xf0f0);
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phy_write(dev, 0x0b, 0x104);
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return 0;
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}
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static int nitrogen6x_coredevices_init(void)
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{
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if (!of_machine_is_compatible("fsl,imx6dl-nitrogen6x") &&
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!of_machine_is_compatible("fsl,imx6q-nitrogen6x"))
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return 0;
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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ksz9021rn_phy_fixup);
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return 0;
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}
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coredevice_initcall(nitrogen6x_coredevices_init);
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static int nitrogen6x_postcore_init(void)
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{
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if (!of_machine_is_compatible("fsl,imx6dl-nitrogen6x") &&
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!of_machine_is_compatible("fsl,imx6q-nitrogen6x"))
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return 0;
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imx6_init_lowlevel();
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barebox_set_hostname("nitrogen6x");
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return 0;
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}
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postcore_initcall(nitrogen6x_postcore_init);
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@ -0,0 +1,6 @@
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#!/bin/sh
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# board defaults, do not change in running system. Change /env/config
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# instead
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global.linux.bootargs.base="console=ttymxc1,115200"
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@ -0,0 +1,106 @@
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soc imx6
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loadaddr 0x20000000
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dcdofs 0x400
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wm 32 0x020e05a8 0x00000030
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wm 32 0x020e05b0 0x00000030
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wm 32 0x020e0524 0x00000030
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wm 32 0x020e051c 0x00000030
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wm 32 0x020e0518 0x00000030
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wm 32 0x020e050c 0x00000030
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wm 32 0x020e05b8 0x00000030
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wm 32 0x020e05c0 0x00000030
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wm 32 0x020e05ac 0x00020030
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wm 32 0x020e05b4 0x00020030
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wm 32 0x020e0528 0x00020030
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wm 32 0x020e0520 0x00020030
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wm 32 0x020e0514 0x00020030
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wm 32 0x020e0510 0x00020030
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wm 32 0x020e05bc 0x00020030
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wm 32 0x020e05c4 0x00020030
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wm 32 0x020e056c 0x00020030
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wm 32 0x020e0578 0x00020030
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wm 32 0x020e0588 0x00020030
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wm 32 0x020e0594 0x00020030
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wm 32 0x020e057c 0x00020030
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wm 32 0x020e0590 0x00003000
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wm 32 0x020e0598 0x00003000
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wm 32 0x020e058c 0x00000000
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wm 32 0x020e059c 0x00003030
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wm 32 0x020e05a0 0x00003030
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wm 32 0x020e0784 0x00000030
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wm 32 0x020e0788 0x00000030
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wm 32 0x020e0794 0x00000030
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wm 32 0x020e079c 0x00000030
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wm 32 0x020e07a0 0x00000030
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wm 32 0x020e07a4 0x00000030
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wm 32 0x020e07a8 0x00000030
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wm 32 0x020e0748 0x00000030
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wm 32 0x020e074c 0x00000030
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wm 32 0x020e0750 0x00020000
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wm 32 0x020e0758 0x00000000
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wm 32 0x020e0774 0x00020000
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wm 32 0x020e078c 0x00000030
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wm 32 0x020e0798 0x000c0000
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wm 32 0x021b081c 0x33333333
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wm 32 0x021b0820 0x33333333
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wm 32 0x021b0824 0x33333333
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wm 32 0x021b0828 0x33333333
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wm 32 0x021b481c 0x33333333
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wm 32 0x021b4820 0x33333333
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wm 32 0x021b4824 0x33333333
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wm 32 0x021b4828 0x33333333
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wm 32 0x021b0018 0x00081740
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wm 32 0x021b001c 0x00008000
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wm 32 0x021b000c 0x555a7975
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wm 32 0x021b0010 0xff538e64
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wm 32 0x021b0014 0x01ff00db
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wm 32 0x021b002c 0x000026d2
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wm 32 0x021b0030 0x005b0e21
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wm 32 0x021b0008 0x09444040
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wm 32 0x021b0004 0x00025576
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wm 32 0x021b0040 0x00000027
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wm 32 0x021b0000 0x831a0000
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wm 32 0x021b001c 0x04088032
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wm 32 0x021b001c 0x0408803a
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wm 32 0x021b001c 0x00008033
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wm 32 0x021b001c 0x0000803b
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wm 32 0x021b001c 0x00428031
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wm 32 0x021b001c 0x00428039
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wm 32 0x021b001c 0x09408030
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wm 32 0x021b001c 0x09408038
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wm 32 0x021b001c 0x04008040
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wm 32 0x021b001c 0x04008048
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wm 32 0x021b0800 0xa1380003
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wm 32 0x021b4800 0xa1380003
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wm 32 0x021b0020 0x00005800
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wm 32 0x021b0818 0x00022227
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wm 32 0x021b4818 0x00022227
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wm 32 0x021b083c 0x434b0350
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wm 32 0x021b0840 0x034c0359
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wm 32 0x021b483c 0x434b0350
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wm 32 0x021b4840 0x03650348
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wm 32 0x021b0848 0x4436383b
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wm 32 0x021b4848 0x39393341
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wm 32 0x021b0850 0x35373933
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wm 32 0x021b4850 0x48254A36
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wm 32 0x021b080c 0x001f001f
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wm 32 0x021b0810 0x001f001f
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wm 32 0x021b480c 0x00440044
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wm 32 0x021b4810 0x00440044
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wm 32 0x021b08b8 0x00000800
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wm 32 0x021b48b8 0x00000800
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wm 32 0x021b001c 0x00000000
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wm 32 0x021b0404 0x00011006
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wm 32 0x020c4068 0x00c03f3f
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wm 32 0x020c406c 0x0030fc03
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wm 32 0x020c4070 0x0fffc000
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wm 32 0x020c4074 0x3ff00000
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wm 32 0x020c4078 0x00fff300
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wm 32 0x020c407c 0x0f0000c3
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wm 32 0x020c4080 0x000003ff
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/* enable AXI cache for VDOA/VPU/IPU */
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wm 32 0x020e0010 0xf00000cf
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/* set IPU AXI-id0 Qos=0xf(bypass AXI-id1 Qos=0x7 */
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wm 32 0x020e0018 0x007f007f
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wm 32 0x020e001c 0x007f007f
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@ -0,0 +1,30 @@
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#include <common.h>
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#include <sizes.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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extern char __dtb_imx6q_nitrogen6x_start[];
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ENTRY_FUNCTION(start_imx6q_nitrogen6x_1g, r0, r1, r2)
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{
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uint32_t fdt;
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arm_cpu_lowlevel_init();
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fdt = (uint32_t)__dtb_imx6q_nitrogen6x_start - get_runtime_offset();
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barebox_arm_entry(0x10000000, SZ_1G, fdt);
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}
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extern char __dtb_imx6dl_nitrogen6x_start[];
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ENTRY_FUNCTION(start_imx6dl_nitrogen6x_1g, r0, r1, r2)
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{
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uint32_t fdt;
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arm_cpu_lowlevel_init();
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fdt = (uint32_t)__dtb_imx6dl_nitrogen6x_start - get_runtime_offset();
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barebox_arm_entry(0x10000000, SZ_1G, fdt);
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}
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@ -16,7 +16,9 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
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imx6dl-mba6x.dtb \
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imx6q-mba6x.dtb \
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imx6q-phytec-pbab01.dtb \
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imx6dl-cubox-i-carrier-1.dtb
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imx6dl-cubox-i-carrier-1.dtb \
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imx6q-nitrogen6x.dtb \
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imx6dl-nitrogen6x.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox.dtb
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dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
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socfpga_cyclone5_socrates.dtb
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@ -45,6 +47,7 @@ pbl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
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pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
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pbl-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += imx6dl-cubox-i-carrier-1.dtb.o
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pbl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o
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pbl-$(CONFIG_MACH_NITROGEN6X) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o
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.SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S
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.SECONDARY: $(patsubst %,$(obj)/%.S,$(dtb-y))
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@ -0,0 +1,21 @@
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/*
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* Copyright 2013 Boundary Devices, Inc.
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-nitrogen6x.dtsi"
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/ {
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model = "Freescale i.MX6 DualLite Nitrogen6x Board";
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compatible = "fsl,imx6dl-nitrogen6x", "fsl,imx6dl";
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};
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@ -0,0 +1,25 @@
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/*
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* Copyright 2013 Boundary Devices, Inc.
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx6q.dtsi"
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#include "imx6qdl-nitrogen6x.dtsi"
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/ {
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model = "Freescale i.MX6 Quad Nitrogen6x Board";
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compatible = "fsl,imx6q-nitrogen6x", "fsl,imx6q";
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};
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&sata {
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status = "okay";
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};
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@ -0,0 +1,412 @@
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/*
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* Copyright 2013 Boundary Devices, Inc.
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
|
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* Version 2 or later at the following locations:
|
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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linux,stdout-path = &uart2;
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environment@0 {
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compatible = "barebox,environment";
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device-path = &flash, "partname:barebox-environment";
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};
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};
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memory {
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reg = <0x10000000 0x40000000>;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_2p5v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 0>;
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enable-active-high;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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power {
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label = "Power Button";
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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gpio-key,wakeup;
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};
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menu {
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label = "Menu";
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_MENU>;
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};
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home {
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label = "Home";
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gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_HOME>;
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};
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back {
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label = "Back";
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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sound {
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compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6q-nitrogen6x-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
|
||||
"Headphone Jack", "HP_OUT";
|
||||
mux-int-port = <1>;
|
||||
mux-ext-port = <3>;
|
||||
};
|
||||
|
||||
backlight_lcd {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm1 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
power-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
backlight_lvds {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm4 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
power-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecspi1 {
|
||||
fsl,spi-num-chipselects = <1>;
|
||||
cs-gpios = <&gpio3 19 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi1>;
|
||||
status = "okay";
|
||||
|
||||
flash: m25p80@0 {
|
||||
compatible = "sst,sst25vf016b", "m25p80";
|
||||
spi-max-frequency = <20000000>;
|
||||
reg = <0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "barebox";
|
||||
reg = <0x0 0x80000>;
|
||||
};
|
||||
|
||||
partition@1 {
|
||||
label = "barebox-environment";
|
||||
reg = <0x80000 0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii";
|
||||
phy-reset-gpios = <&gpio1 27 0>;
|
||||
txen-skew-ps = <0>;
|
||||
txc-skew-ps = <3000>;
|
||||
rxdv-skew-ps = <0>;
|
||||
rxc-skew-ps = <3000>;
|
||||
rxd0-skew-ps = <0>;
|
||||
rxd1-skew-ps = <0>;
|
||||
rxd2-skew-ps = <0>;
|
||||
rxd3-skew-ps = <0>;
|
||||
txd0-skew-ps = <0>;
|
||||
txd1-skew-ps = <0>;
|
||||
txd2-skew-ps = <0>;
|
||||
txd3-skew-ps = <0>;
|
||||
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks 201>;
|
||||
VDDA-supply = <®_2p5v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
imx6q-nitrogen6x {
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
/* SGTL5000 sys_mclk */
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_audmux: audmuxgrp {
|
||||
fsl,pins = <MX6QDL_AUDMUX_PINGRP2>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi1: ecspi1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_ECSPI1_PINGRP1
|
||||
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x100b0)
|
||||
/* Phy reset */
|
||||
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
|
||||
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_keys: gpio_keysgrp {
|
||||
fsl,pins = <
|
||||
/* Power Button */
|
||||
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
|
||||
/* Menu Button */
|
||||
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
|
||||
/* Home Button */
|
||||
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
|
||||
/* Back Button */
|
||||
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
||||
/* Volume Up Button */
|
||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
|
||||
/* Volume Down Button */
|
||||
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <MX6QDL_I2C1_PINGRP1>;
|
||||
};
|
||||
|
||||
pinctrl_pwm1: pwm1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <MX6QDL_UART1_PINGRP2>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <MX6QDL_UART2_PINGRP1>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
|
||||
/* power enable, high active */
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_USDHC3_PINGRP_D4
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc4: usdhc4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_USDHC4_PINGRP_D4
|
||||
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ldb {
|
||||
status = "okay";
|
||||
|
||||
lvds-channel@0 {
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <18>;
|
||||
status = "okay";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: hsd100pxn1 {
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hback-porch = <220>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <21>;
|
||||
vfront-porch = <7>;
|
||||
hsync-len = <60>;
|
||||
vsync-len = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ocotp {
|
||||
barebox,provide-mac-address = <&fec 0x620>;
|
||||
};
|
||||
|
||||
&pcie {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
fsl,mode = "i2s-slave";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
phy_type = "utmi";
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
phy_type = "utmi";
|
||||
dr_mode = "host";
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
cd-gpios = <&gpio7 0 0>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc4>;
|
||||
cd-gpios = <&gpio2 6 0>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -228,6 +228,10 @@ config MACH_SABRELITE
|
|||
select ARCH_IMX6
|
||||
select HAVE_DEFAULT_ENVIRONMENT_NEW
|
||||
select HAVE_PBL_MULTI_IMAGES
|
||||
|
||||
config MACH_NITROGEN6X
|
||||
bool "BoundaryDevices Nitrogen6x"
|
||||
select ARCH_IMX6
|
||||
|
||||
config MACH_SOLIDRUN_CARRIER1
|
||||
bool "SolidRun CuBox-i Carrier-1"
|
||||
|
|
|
|||
|
|
@ -93,3 +93,13 @@ pblx-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += start_imx6dl_cubox_i_carrier_1
|
|||
CFG_start_imx6dl_cubox_i_carrier_1.pblx.imximg = $(board)/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg
|
||||
FILE_barebox-cubox-i-carrier-1.img = start_imx6dl_cubox_i_carrier_1.pblx.imximg
|
||||
image-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += barebox-cubox-i-carrier-1.img
|
||||
|
||||
pblx-$(CONFIG_MACH_NITROGEN6X) += start_imx6q_nitrogen6x_1g
|
||||
CFG_start_imx6q_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
|
||||
FILE_barebox-boundarydevices-imx6q-nitrogen6x-1g.img = start_imx6q_nitrogen6x_1g.pblx.imximg
|
||||
image-$(CONFIG_MACH_NITROGEN6X) += barebox-boundarydevices-imx6q-nitrogen6x-1g.img
|
||||
|
||||
pblx-$(CONFIG_MACH_NITROGEN6X) += start_imx6dl_nitrogen6x_1g
|
||||
CFG_start_imx6dl_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
|
||||
FILE_barebox-boundarydevices-imx6dl-nitrogen6x-1g.img = start_imx6dl_nitrogen6x_1g.pblx.imximg
|
||||
image-$(CONFIG_MACH_NITROGEN6X) += barebox-boundarydevices-imx6dl-nitrogen6x-1g.img
|
||||
|
|
|
|||
Loading…
Reference in New Issue