Incorporated modified Linker Scripts; add compiler flags and reallyclean option
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/*
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Common part of the linker scripts for STR71x devices in FLASH mode
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(that is, the FLASH is seen at 0)
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Copyright RAISONANCE 2005
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You can use, modify and distribute this file freely, but without any warranty.
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*/
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/* Sections Definitions */
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SECTIONS
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{
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/* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* the program code is stored in the .text section, which goes to Flash */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* normal code */
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*(.text.*) /* -ffunction-sections code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*) /* -fdata-sections read only data */
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*(.glue_7) /* TBD - needed ? */
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*(.glue_7t) /* TBD - needed ? */
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/* Necessary KEEP sections (see http://sourceware.org/ml/newlib/2005/msg00255.html) */
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .;
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/* This is used by the startup in order to initialize the .data section */
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_sidata = _etext;
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} >FLASH
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/* This is the initialized data section
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The program executes knowing that the data is in the RAM
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but the loader puts the initial values in the FLASH (inidata).
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It is one task of the startup to copy the initial values from FLASH to RAM. */
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.data : AT ( _sidata )
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_sdata = . ;
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_data = . ;
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*(.data)
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*(.data.*)
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*(.RAMtext)
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_edata = . ;
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} >RAM
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/* This is the uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .;
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_bss = .;
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*(.bss)
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*(.bss.*) /* patched by elias - allows the use of -fdata-sections */
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*(COMMON)
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_ebss = . ;
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} >RAM
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PROVIDE ( end = _ebss );
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PROVIDE ( _end = _ebss );
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__exidx_start = .;
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__exidx_end = .;
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/* after that it's only debugging information. */
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/* remove the debugging information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}
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@ -0,0 +1,15 @@
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/*
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Default linker script for STM32F051R8T6 64k 8k
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Copyright RAISONANCE S.A.S. 2007
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!!! This file is automatically generated by RIDE !!!
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Do not modify it, as it will be erased at every link.
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You can use, copy and distribute this file freely, but without any waranty.
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*/
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/* include the memory spaces definitions sub-script */
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INCLUDE "stm32f0discovery_def.ld"
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/* include the sections management sub-script for FLASH mode */
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INCLUDE "sections_flash.ld"
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@ -0,0 +1,20 @@
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/*
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Linker subscript for STM32F051 definitions with 64K Flash and 8K RAM
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Copyright RAISONANCE 2007
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!!! This file is automatically generated by RIDE !!!
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Do not modify it, as it will be erased at every link.
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You can use, copy and distribute this file freely, but without any warranty.
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*/
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/* Memory Spaces Definitions */
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ENTRY(Reset_Handler)
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
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}
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/* highest address of the user mode stack */
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_estack = 0x20002000;
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32
Makefile
32
Makefile
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# Location of the Libraries folder from the STM32F0xx Standard Peripheral Library
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# Location of the Libraries folder from the STM32F0xx Standard Peripheral Library
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STD_PERIPH_LIB=Libraries
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STD_PERIPH_LIB=Libraries
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# Location of the linker scripts
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LDSCRIPT_INC=Device/ldscripts
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# location of OpenOCD Board .cfg files (only used with 'make program')
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# location of OpenOCD Board .cfg files (only used with 'make program')
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OPENOCD_BOARD_DIR=/usr/share/openocd/scripts/board
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OPENOCD_BOARD_DIR=/usr/share/openocd/scripts/board
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@ -19,9 +22,14 @@ OPENOCD_PROC_FILE=extra/stm32f0-openocd.cfg
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CC=arm-none-eabi-gcc
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CC=arm-none-eabi-gcc
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OBJCOPY=arm-none-eabi-objcopy
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OBJCOPY=arm-none-eabi-objcopy
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OBJDUMP=arm-none-eabi-objdump
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SIZE=arm-none-eabi-size
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CFLAGS = -g -O2 -Wall -TDevice/stm32_flash.ld
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CFLAGS = -Wall -g -std=c99 -Os
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CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m
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#CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m0 -march=armv6s-m
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CFLAGS += -mlittle-endian -mcpu=cortex-m0 -march=armv6-m -mthumb
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CFLAGS += -ffunction-sections -fdata-sections
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CFLAGS += -Wl,--gc-sections -Wl,-Map=$(PROJ_NAME).map
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###################################################
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###################################################
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@ -30,12 +38,16 @@ vpath %.a $(STD_PERIPH_LIB)
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ROOT=$(shell pwd)
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ROOT=$(shell pwd)
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CFLAGS += -Iinc -I$(STD_PERIPH_LIB) -I$(STD_PERIPH_LIB)/CMSIS/Device/ST/STM32F0xx/Include
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CFLAGS += -I inc -I $(STD_PERIPH_LIB) -I $(STD_PERIPH_LIB)/CMSIS/Device/ST/STM32F0xx/Include
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CFLAGS += -I$(STD_PERIPH_LIB)/CMSIS/Include -I$(STD_PERIPH_LIB)/STM32F0xx_StdPeriph_Driver/inc
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CFLAGS += -I $(STD_PERIPH_LIB)/CMSIS/Include -I $(STD_PERIPH_LIB)/STM32F0xx_StdPeriph_Driver/inc
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CFLAGS += -include$(STD_PERIPH_LIB)/stm32f0xx_conf.h
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CFLAGS += -include $(STD_PERIPH_LIB)/stm32f0xx_conf.h
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SRCS += Device/startup_stm32f0xx.s # add startup file to build
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SRCS += Device/startup_stm32f0xx.s # add startup file to build
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# need if you want to build with -DUSE_CMSIS
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#SRCS += stm32f0_discovery.c
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#SRCS += stm32f0_discovery.c stm32f0xx_it.c
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OBJS = $(SRCS:.c=.o)
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OBJS = $(SRCS:.c=.o)
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###################################################
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###################################################
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@ -50,15 +62,23 @@ lib:
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proj: $(PROJ_NAME).elf
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proj: $(PROJ_NAME).elf
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$(PROJ_NAME).elf: $(SRCS)
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$(PROJ_NAME).elf: $(SRCS)
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$(CC) $(CFLAGS) $^ -o $@ -L$(STD_PERIPH_LIB) -lstm32f0
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$(CC) $(CFLAGS) $^ -o $@ -L$(STD_PERIPH_LIB) -lstm32f0 -L$(LDSCRIPT_INC) -Tstm32f0.ld
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$(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex
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$(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex
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$(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin
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$(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin
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$(OBJDUMP) -St $(PROJ_NAME).elf >$(PROJ_NAME).lst
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$(SIZE) $(PROJ_NAME).elf
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program: $(PROJ_NAME).bin
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program: $(PROJ_NAME).bin
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openocd -f $(OPENOCD_BOARD_DIR)/stm32f0discovery.cfg -f $(OPENOCD_PROC_FILE) -c "stm_flash `pwd`/$(PROJ_NAME).bin" -c shutdown
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openocd -f $(OPENOCD_BOARD_DIR)/stm32f0discovery.cfg -f $(OPENOCD_PROC_FILE) -c "stm_flash `pwd`/$(PROJ_NAME).bin" -c shutdown
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clean:
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clean:
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find ./ -name '*~' | xargs rm -f
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rm -f *.o
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rm -f *.o
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rm -f $(PROJ_NAME).elf
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rm -f $(PROJ_NAME).elf
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rm -f $(PROJ_NAME).hex
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rm -f $(PROJ_NAME).hex
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rm -f $(PROJ_NAME).bin
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rm -f $(PROJ_NAME).bin
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rm -f $(PROJ_NAME).map
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rm -f $(PROJ_NAME).lst
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reallyclean: clean
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$(MAKE) -C $(STD_PERIPH_LIB) clean
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