Merge changes from sid branch
svn path=/dists/trunk/linux-2.6/; revision=16774
This commit is contained in:
parent
291ea8476f
commit
e782daae45
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@ -8,6 +8,11 @@ linux-2.6 (2.6.37~rc8-1~experimental.1) UNRELEASED; urgency=low
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* watchdog: Improve failure message and documentation (Closes: #608138)
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* [x86] Staging: Enable R8712U as module (r8712u, replacing r8192s_usb)
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- Enable loading external firmware, thanks to Stefan Lippers-Hollmann
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* linux-base: Look for GRUB 1 configuration in both /boot/grub and
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/boot/boot/grub (Closes: #607863)
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* btrfs: Require CAP_SYS_ADMIN for filesystem rebalance (Closes: #608185)
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* r8169: Change RTL8111D/RTL8168D initialisation and firmware loading to
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match upstream version (Closes: #596390 with firmware-realtek 0.28)
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-- Ben Hutchings <ben@decadent.org.uk> Tue, 28 Dec 2010 03:15:05 +0000
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@ -238,6 +238,15 @@ sub shellvars_quote {
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### GRUB 1 (grub-legacy) config
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sub grub1_path {
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for ('/boot/grub', '/boot/boot/grub') {
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if (-d) {
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return "$_/menu.lst";
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}
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}
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return undef;
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}
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sub grub1_parse {
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my ($file) = @_;
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my @results = ();
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@ -928,7 +937,7 @@ my @config_files = ({packages => 'mount',
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list => \&fstab_list,
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update => \&fstab_update},
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{packages => 'grub grub-legacy',
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path => '/boot/grub/menu.lst',
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path => grub1_path(),
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list => \&grub1_list,
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update => \&grub1_update,
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post_update => \&grub1_post,
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41
debian/patches/bugfix/all/btrfs-Require-CAP_SYS_ADMIN-for-filesystem-rebalance.patch
vendored
Normal file
41
debian/patches/bugfix/all/btrfs-Require-CAP_SYS_ADMIN-for-filesystem-rebalance.patch
vendored
Normal file
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@ -0,0 +1,41 @@
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Subject: [PATCH] btrfs: Require CAP_SYS_ADMIN for filesystem rebalance
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From: Ben Hutchings <ben@decadent.org.uk>
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Date: Wed, 29 Dec 2010 14:55:03 +0000
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Filesystem rebalancing (BTRFS_IOC_BALANCE) affects the entire
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filesystem and may run uninterruptibly for a long time. This does not
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seem to be something that an unprivileged user should be able to do.
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Reported-by: Aron Xu <happyaron.xu@gmail.com>
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Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
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---
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fs/btrfs/volumes.c | 4 ++++
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1 files changed, 4 insertions(+), 0 deletions(-)
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diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
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index cc04dc1..2313e8b 100644
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--- a/fs/btrfs/volumes.c
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+++ b/fs/btrfs/volumes.c
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@@ -22,6 +22,7 @@
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#include <linux/blkdev.h>
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#include <linux/random.h>
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#include <linux/iocontext.h>
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+#include <linux/capability.h>
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#include <asm/div64.h>
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#include "compat.h"
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#include "ctree.h"
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@@ -1905,6 +1906,9 @@ int btrfs_balance(struct btrfs_root *dev_root)
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if (dev_root->fs_info->sb->s_flags & MS_RDONLY)
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return -EROFS;
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+ if (!capable(CAP_SYS_ADMIN))
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+ return -EPERM;
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+
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mutex_lock(&dev_root->fs_info->volume_mutex);
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dev_root = dev_root->fs_info->dev_root;
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--
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1.7.2.3
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@ -0,0 +1,311 @@
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From: Francois Romieu <romieu@fr.zoreil.com>
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Date: Mon, 3 Jan 2011 00:35:52 +0100
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Subject: [PATCH] r8169: remove the firmware of RTL8111D.
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commit bca03d5f32c8ee9b5cfa1d32640a63fded6cb3c0 upstream.
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The binary file of the firmware is moved to linux-firmware repository.
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The firmwares are rtl_nic/rtl8168d-1.fw and rtl_nic/rtl8168d-2.fw.
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The driver goes along if the firmware couldn't be found. However, it
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is suggested to be done with the suitable firmware.
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Some wrong PHY parameters are directly corrected in the driver.
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Simple firmware checking added per Ben Hutchings suggestion.
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Signed-off-by: Hayes Wang <hayeswang@realtek.com>
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Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
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Cc: Ben Hutchings <benh@debian.org>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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[bwh: Adjust for Debian's 2.6.37]
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---
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drivers/net/Kconfig | 1 +
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drivers/net/r8169.c | 157 ++++++++++++++++++++++++++++++++++++++++++++-------
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2 files changed, 138 insertions(+), 20 deletions(-)
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diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
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index 4f1755b..c647651 100644
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--- a/drivers/net/Kconfig
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+++ b/drivers/net/Kconfig
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@@ -2233,6 +2233,7 @@ config YELLOWFIN
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config R8169
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tristate "Realtek 8169 gigabit ethernet support"
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depends on PCI
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+ select FW_LOADER
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select CRC32
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select MII
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---help---
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diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
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index c9c6f0a..49a6db6 100644
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--- a/drivers/net/r8169.c
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+++ b/drivers/net/r8169.c
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@@ -24,6 +24,7 @@
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#include <linux/init.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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+#include <linux/firmware.h>
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#include <asm/system.h>
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#include <asm/io.h>
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@@ -33,6 +34,9 @@
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#define MODULENAME "r8169"
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#define PFX MODULENAME ": "
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+#define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
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+#define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
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+
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#ifdef RTL8169_DEBUG
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#define assert(expr) \
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if (!(expr)) { \
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@@ -514,6 +518,8 @@ module_param_named(debug, debug.msg_enable, int, 0);
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MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(RTL8169_VERSION);
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+MODULE_FIRMWARE(FIRMWARE_8168D_1);
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+MODULE_FIRMWARE(FIRMWARE_8168D_2);
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static int rtl8169_open(struct net_device *dev);
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static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
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@@ -1393,6 +1399,65 @@ static void rtl_phy_write(void __iomem *ioaddr, const struct phy_reg *regs, int
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}
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}
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+#define PHY_READ 0x00000000
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+#define PHY_DATA_OR 0x10000000
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+#define PHY_DATA_AND 0x20000000
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+#define PHY_BJMPN 0x30000000
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+#define PHY_READ_EFUSE 0x40000000
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+#define PHY_READ_MAC_BYTE 0x50000000
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+#define PHY_WRITE_MAC_BYTE 0x60000000
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+#define PHY_CLEAR_READCOUNT 0x70000000
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+#define PHY_WRITE 0x80000000
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+#define PHY_READCOUNT_EQ_SKIP 0x90000000
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+#define PHY_COMP_EQ_SKIPN 0xa0000000
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+#define PHY_COMP_NEQ_SKIPN 0xb0000000
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+#define PHY_WRITE_PREVIOUS 0xc0000000
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+#define PHY_SKIPN 0xd0000000
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+#define PHY_DELAY_MS 0xe0000000
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+#define PHY_WRITE_ERI_WORD 0xf0000000
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+
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+static void
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+rtl_phy_write_fw(struct rtl8169_private *tp, const struct firmware *fw)
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+{
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+ void __iomem *ioaddr = tp->mmio_addr;
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+ __le32 *phytable = (__le32 *)fw->data;
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+ struct net_device *dev = tp->dev;
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+ size_t i;
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+
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+ if (fw->size % sizeof(*phytable)) {
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+ netif_err(tp, probe, dev, "odd sized firmware %zd\n", fw->size);
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+ return;
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+ }
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+
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+ for (i = 0; i < fw->size / sizeof(*phytable); i++) {
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+ u32 action = le32_to_cpu(phytable[i]);
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+
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+ if (!action)
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+ break;
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+
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+ if ((action & 0xf0000000) != PHY_WRITE) {
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+ netif_err(tp, probe, dev,
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+ "unknown action 0x%08x\n", action);
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+ return;
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+ }
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+ }
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+
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+ while (i-- != 0) {
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+ u32 action = le32_to_cpu(*phytable);
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+ u32 data = action & 0x0000ffff;
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+ u32 reg = (action & 0x0fff0000) >> 16;
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+
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+ switch(action & 0xf0000000) {
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+ case PHY_WRITE:
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+ mdio_write(ioaddr, reg, data);
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+ phytable++;
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+ break;
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+ default:
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+ BUG();
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+ }
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+ }
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+}
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+
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static void rtl8169s_hw_phy_config(void __iomem *ioaddr)
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{
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static const struct phy_reg phy_reg_init[] = {
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@@ -1725,9 +1790,10 @@ static void rtl8168c_4_hw_phy_config(void __iomem *ioaddr)
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rtl8168c_3_hw_phy_config(ioaddr);
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}
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-static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
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+static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
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{
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static const struct phy_reg phy_reg_init_0[] = {
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+ /* Channel Estimation */
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{ 0x1f, 0x0001 },
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{ 0x06, 0x4064 },
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{ 0x07, 0x2863 },
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@@ -1744,24 +1810,41 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
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{ 0x12, 0xf49f },
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{ 0x13, 0x070b },
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{ 0x1a, 0x05ad },
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- { 0x14, 0x94c0 }
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- };
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- static const struct phy_reg phy_reg_init_1[] = {
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+ { 0x14, 0x94c0 },
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+
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+ /*
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+ * Tx Error Issue
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+ * enhance line driver power
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+ */
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{ 0x1f, 0x0002 },
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{ 0x06, 0x5561 },
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{ 0x1f, 0x0005 },
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{ 0x05, 0x8332 },
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- { 0x06, 0x5561 }
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+ { 0x06, 0x5561 },
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+
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+ /*
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+ * Can not link to 1Gbps with bad cable
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+ * Decrease SNR threshold form 21.07dB to 19.04dB
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+ */
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+ { 0x1f, 0x0001 },
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+ { 0x17, 0x0cc0 },
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+
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+ { 0x1f, 0x0000 },
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+ { 0x0d, 0xf880 }
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};
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+ void __iomem *ioaddr = tp->mmio_addr;
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+ const struct firmware *fw;
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rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
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+ /*
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+ * Rx Error Issue
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+ * Fine Tune Switching regulator parameter
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+ */
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mdio_write(ioaddr, 0x1f, 0x0002);
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mdio_plus_minus(ioaddr, 0x0b, 0x0010, 0x00ef);
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mdio_plus_minus(ioaddr, 0x0c, 0xa200, 0x5d00);
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- rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
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-
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if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
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static const struct phy_reg phy_reg_init[] = {
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{ 0x1f, 0x0002 },
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@@ -1802,22 +1885,33 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
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rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
|
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}
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+ /* RSET couple improve */
|
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mdio_write(ioaddr, 0x1f, 0x0002);
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mdio_patch(ioaddr, 0x0d, 0x0300);
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mdio_patch(ioaddr, 0x0f, 0x0010);
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+ /* Fine tune PLL performance */
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mdio_write(ioaddr, 0x1f, 0x0002);
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mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
|
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mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
|
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-#ifdef CONFIG_BROKEN
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- rtl_phy_write(ioaddr, phy_reg_init_2, ARRAY_SIZE(phy_reg_init_2));
|
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-#endif
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+ mdio_write(ioaddr, 0x1f, 0x0005);
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+ mdio_write(ioaddr, 0x05, 0x001b);
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+ if (mdio_read(ioaddr, 0x06) == 0xbf00 &&
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+ request_firmware(&fw, FIRMWARE_8168D_1, &tp->pci_dev->dev) == 0) {
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+ rtl_phy_write_fw(tp, fw);
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+ release_firmware(fw);
|
||||
+ } else {
|
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+ netif_warn(tp, probe, tp->dev, "unable to apply firmware patch\n");
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+ }
|
||||
+
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+ mdio_write(ioaddr, 0x1f, 0x0000);
|
||||
}
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-static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
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+static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
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{
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static const struct phy_reg phy_reg_init_0[] = {
|
||||
+ /* Channel Estimation */
|
||||
{ 0x1f, 0x0001 },
|
||||
{ 0x06, 0x4064 },
|
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{ 0x07, 0x2863 },
|
||||
@@ -1836,12 +1930,28 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
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{ 0x1a, 0x05ad },
|
||||
{ 0x14, 0x94c0 },
|
||||
|
||||
+ /*
|
||||
+ * Tx Error Issue
|
||||
+ * enhance line driver power
|
||||
+ */
|
||||
{ 0x1f, 0x0002 },
|
||||
{ 0x06, 0x5561 },
|
||||
{ 0x1f, 0x0005 },
|
||||
{ 0x05, 0x8332 },
|
||||
- { 0x06, 0x5561 }
|
||||
+ { 0x06, 0x5561 },
|
||||
+
|
||||
+ /*
|
||||
+ * Can not link to 1Gbps with bad cable
|
||||
+ * Decrease SNR threshold form 21.07dB to 19.04dB
|
||||
+ */
|
||||
+ { 0x1f, 0x0001 },
|
||||
+ { 0x17, 0x0cc0 },
|
||||
+
|
||||
+ { 0x1f, 0x0000 },
|
||||
+ { 0x0d, 0xf880 }
|
||||
};
|
||||
+ void __iomem *ioaddr = tp->mmio_addr;
|
||||
+ const struct firmware *fw;
|
||||
|
||||
rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
|
||||
|
||||
@@ -1885,19 +1995,26 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
|
||||
rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
|
||||
}
|
||||
|
||||
+ /* Fine tune PLL performance */
|
||||
mdio_write(ioaddr, 0x1f, 0x0002);
|
||||
mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
|
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mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
|
||||
|
||||
- mdio_write(ioaddr, 0x1f, 0x0001);
|
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- mdio_write(ioaddr, 0x17, 0x0cc0);
|
||||
-
|
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+ /* Switching regulator Slew rate */
|
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mdio_write(ioaddr, 0x1f, 0x0002);
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mdio_patch(ioaddr, 0x0f, 0x0017);
|
||||
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||||
-#ifdef CONFIG_BROKEN
|
||||
- rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
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-#endif
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||||
+ mdio_write(ioaddr, 0x1f, 0x0005);
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+ mdio_write(ioaddr, 0x05, 0x001b);
|
||||
+ if (mdio_read(ioaddr, 0x06) == 0xb300 &&
|
||||
+ request_firmware(&fw, FIRMWARE_8168D_2, &tp->pci_dev->dev) == 0) {
|
||||
+ rtl_phy_write_fw(tp, fw);
|
||||
+ release_firmware(fw);
|
||||
+ } else {
|
||||
+ netif_warn(tp, probe, tp->dev, "unable to apply firmware patch\n");
|
||||
+ }
|
||||
+
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||||
+ mdio_write(ioaddr, 0x1f, 0x0000);
|
||||
}
|
||||
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static void rtl8168d_3_hw_phy_config(void __iomem *ioaddr)
|
||||
@@ -2035,10 +2152,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
|
||||
rtl8168cp_2_hw_phy_config(ioaddr);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_25:
|
||||
- rtl8168d_1_hw_phy_config(ioaddr);
|
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+ rtl8168d_1_hw_phy_config(tp);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_26:
|
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- rtl8168d_2_hw_phy_config(ioaddr);
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+ rtl8168d_2_hw_phy_config(tp);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_27:
|
||||
rtl8168d_3_hw_phy_config(ioaddr);
|
||||
--
|
||||
1.7.2.3
|
||||
|
|
@ -1,135 +0,0 @@
|
|||
From: Ben Hutchings <ben@decadent.org.uk>
|
||||
Subject: [PATCH] r8169: remove firmware for RTL8169D PHY
|
||||
|
||||
The recently added support for RTL8169D chips included some machine
|
||||
code without accompanying source code. Replace this with use of the
|
||||
firmware loader.
|
||||
|
||||
--- a/drivers/net/Kconfig
|
||||
+++ b/drivers/net/Kconfig
|
||||
@@ -2172,6 +2172,7 @@ config R8169
|
||||
depends on PCI
|
||||
select CRC32
|
||||
select MII
|
||||
+ select FW_LOADER
|
||||
---help---
|
||||
Say Y here if you have a Realtek 8169 PCI Gigabit Ethernet adapter.
|
||||
|
||||
--- a/drivers/net/r8169.c
|
||||
+++ b/drivers/net/r8169.c
|
||||
@@ -23,6 +23,7 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
+#include <linux/firmware.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
@@ -1359,6 +1360,23 @@ static void rtl_phy_write(void __iomem *ioaddr, struct phy_reg *regs, int len)
|
||||
}
|
||||
}
|
||||
|
||||
+struct phy_reg_le {
|
||||
+ __le16 reg;
|
||||
+ __le16 val;
|
||||
+};
|
||||
+
|
||||
+static void rtl_phy_write_fw(void __iomem *ioaddr, const struct firmware *fw)
|
||||
+{
|
||||
+ const struct phy_reg_le *regs = (const struct phy_reg_le *)fw->data;
|
||||
+ size_t len = fw->size / sizeof(*regs);
|
||||
+
|
||||
+ while (len-- > 0) {
|
||||
+ mdio_write(ioaddr, le16_to_cpu(regs->reg),
|
||||
+ le16_to_cpu(regs->val));
|
||||
+ regs++;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static void rtl8169s_hw_phy_config(void __iomem *ioaddr)
|
||||
{
|
||||
static const struct phy_reg phy_reg_init[] = {
|
||||
@@ -1691,7 +1709,7 @@ static void rtl8168c_4_hw_phy_config(void __iomem *ioaddr)
|
||||
rtl8168c_3_hw_phy_config(ioaddr);
|
||||
}
|
||||
|
||||
-static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
|
||||
+static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
|
||||
{
|
||||
static const struct phy_reg phy_reg_init_0[] = {
|
||||
{ 0x1f, 0x0001 },
|
||||
@@ -1719,6 +1737,8 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
|
||||
{ 0x05, 0x8332 },
|
||||
{ 0x06, 0x5561 }
|
||||
};
|
||||
+ void __iomem *ioaddr = tp->mmio_addr;
|
||||
+ const struct firmware *fw;
|
||||
|
||||
rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
|
||||
|
||||
@@ -1776,12 +1801,18 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
|
||||
mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
|
||||
mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
|
||||
|
||||
-#ifdef CONFIG_BROKEN
|
||||
- rtl_phy_write(ioaddr, phy_reg_init_2, ARRAY_SIZE(phy_reg_init_2));
|
||||
-#endif
|
||||
+ if (request_firmware(&fw, "rtl8168d-1.fw", &tp->pci_dev->dev) == 0) {
|
||||
+ rtl_phy_write_fw(ioaddr, fw);
|
||||
+ release_firmware(fw);
|
||||
+ } else {
|
||||
+ printk(KERN_WARNING "%s: unable to apply firmware patch\n",
|
||||
+ tp->dev->name);
|
||||
+ }
|
||||
}
|
||||
|
||||
-static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
|
||||
+MODULE_FIRMWARE("rtl8168d-1.fw");
|
||||
+
|
||||
+static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
|
||||
{
|
||||
static const struct phy_reg phy_reg_init_0[] = {
|
||||
{ 0x1f, 0x0001 },
|
||||
@@ -1808,6 +1836,8 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
|
||||
{ 0x05, 0x8332 },
|
||||
{ 0x06, 0x5561 }
|
||||
};
|
||||
+ void __iomem *ioaddr = tp->mmio_addr;
|
||||
+ const struct firmware *fw;
|
||||
|
||||
rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
|
||||
|
||||
@@ -1861,11 +1896,17 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
|
||||
mdio_write(ioaddr, 0x1f, 0x0002);
|
||||
mdio_patch(ioaddr, 0x0f, 0x0017);
|
||||
|
||||
-#ifdef CONFIG_BROKEN
|
||||
- rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
|
||||
-#endif
|
||||
+ if (request_firmware(&fw, "rtl8168d-2.fw", &tp->pci_dev->dev) == 0) {
|
||||
+ rtl_phy_write_fw(ioaddr, fw);
|
||||
+ release_firmware(fw);
|
||||
+ } else {
|
||||
+ printk(KERN_WARNING "%s: unable to apply firmware patch\n",
|
||||
+ tp->dev->name);
|
||||
+ }
|
||||
}
|
||||
|
||||
+MODULE_FIRMWARE("rtl8168d-2.fw");
|
||||
+
|
||||
static void rtl8168d_3_hw_phy_config(void __iomem *ioaddr)
|
||||
{
|
||||
static const struct phy_reg phy_reg_init[] = {
|
||||
@@ -2001,10 +2039,10 @@ static int rtl_hw_phy_config(struct net_device *dev)
|
||||
rtl8168cp_2_hw_phy_config(ioaddr);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_25:
|
||||
- rtl8168d_1_hw_phy_config(ioaddr);
|
||||
+ rtl8168d_1_hw_phy_config(tp);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_26:
|
||||
- rtl8168d_2_hw_phy_config(ioaddr);
|
||||
+ rtl8168d_2_hw_phy_config(tp);
|
||||
break;
|
||||
case RTL_GIGA_MAC_VER_27:
|
||||
rtl8168d_3_hw_phy_config(ioaddr);
|
|
@ -4,7 +4,6 @@
|
|||
|
||||
+ features/all/drivers-media-dvb-usb-af9005-request_firmware.patch
|
||||
|
||||
+ features/all/r8169-rtl8168d-1-2-request_firmware-2.patch
|
||||
+ features/all/sound-pci-cs46xx-request_firmware.patch
|
||||
|
||||
# patches from aufs2 repository, with s/EXPORT_SYMBOL/&_GPL/
|
||||
|
@ -49,3 +48,5 @@
|
|||
+ features/all/watchdog-Improve-failure-message-and-documentation.patch
|
||||
+ features/all/r8712u-Switch-driver-to-use-external-firmware.patch
|
||||
+ features/all/r8712u-Fix-external-firmware-loading.patch
|
||||
+ bugfix/all/btrfs-Require-CAP_SYS_ADMIN-for-filesystem-rebalance.patch
|
||||
+ features/all/r8169-remove-the-firmware-of-RTL8111D.patch
|
||||
|
|
Loading…
Reference in New Issue