[armhf] mvebu: do not register custom DMA operations when coherency is disabled

(Closes: #780858)

svn path=/dists/sid/linux/; revision=22457
This commit is contained in:
Ian Campbell 2015-03-20 20:15:32 +00:00
parent 9f304528a2
commit bcf9b5250a
3 changed files with 60 additions and 0 deletions

2
debian/changelog vendored
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@ -3,6 +3,8 @@ linux (3.16.7-ckt7-2) UNRELEASED; urgency=medium
[ Ian Campbell ]
* Initialise framebuffer console earlier. (Closes: #779935)
* [xen] Enable Xen MCE log support. (Closes: #779698)
* [armhf] mvebu: do not register custom DMA operations when coherency is
disabled (Closes: #780858)
-- Ian Campbell <ijc@debian.org> Wed, 18 Mar 2015 21:07:15 +0000

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@ -0,0 +1,57 @@
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Date: Thu Mar 12 03:58:12 PDT 2015
Subject: [PATCH 3.18-stable v2] ARM: mvebu: do not register custom DMA operations when coherency is disabled
Origin: http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/330108.html
This patch is a partial backport of commit ef01c6c36bb8 ("ARM: mvebu:
remove Armada 375 Z1 workaround for I/O coherency"). This commit was
merged in v3.19, so kernel versions later than v3.19 are not affected
by the problem that this commit fixes.
It does not make a lot of sense to backport this commit entirely,
since it is mainly removing some no longer useful code. However, this
commit is also making sure that the bus_register_notifier that
register the custom DMA operations that should be used for HW I/O
coherency does not get registered when said HW I/O coherency is not
enabled.
This is particularly critical since we have decided to disable HW I/O
coherency completely in all kernels < 4.0, to be on the safe side,
while experimenting a new implementation of the HW I/O coherency in >=
4.0.
Without this commit, kernels earlier than 3.18 have the custom DMA
operations normally used for HW I/O coherency registered (they don't
do cache maintenance operations), while HW I/O coherency is
disabled. It essentially causes every DMA transfer to transfer
garbage.
The issue fixed by this commit was introduced by 5ab5afd8ba83 ("ARM:
mvebu: implement Armada 375 coherency workaround"), but it was not
visible until now since it didn't cause any problem when HW I/O
coherency is enabled.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
Cc: <stable at vger.kernel.org> v3.16..v3.18
---
arch/arm/mach-mvebu/coherency.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 2ffccd4..01efe13 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -448,8 +448,9 @@ static int __init coherency_late_init(void)
armada_375_coherency_init_wa();
}
- bus_register_notifier(&platform_bus_type,
- &mvebu_hwcc_nb);
+ if (coherency_available())
+ bus_register_notifier(&platform_bus_type,
+ &mvebu_hwcc_nb);
return 0;
}
--
2.1.0

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@ -65,6 +65,7 @@ bugfix/x86/acpi-video-add-disable_native_backlight-quirk-for-samsung-730u3e-740u
bugfix/x86/acpi-video-add-disable_native_backlight-quirk-for-samsung-510r.patch
bugfix/x86/acpi-video-disable-native-backlight-on-samsung-series-9.patch
bugfix/x86/drm-i915-quietly-reject-attempts-to-create-non-pagealigned-stolen-objects.patch
bugfix/arm/mvebu-do-not-register-custom-DMA-operations-when-coherency-is-disabled.patch
# Arch features
features/mips/MIPS-Support-hard-limit-of-cpu-count-nr_cpu_ids.patch