* [mips*] Backport a hugetlb fix for Octeon from 3.18.
* [mips*] Backport math emulation fix for MIPS32r2 from 3.18. svn path=/dists/sid/linux/; revision=21979
This commit is contained in:
Aurelien Jarno
parent
85ad1570e6
commit
9d61dbd72f
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@ -34,6 +34,10 @@ linux (3.16.5-2) UNRELEASED; urgency=medium
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* [armhf] enable RTC, GPIO_PCA953X, SENSORS_G762 and watchdog driver for
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Netgear ReadyNAS 102/104
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[ Aurelien Jarno ]
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* [mips*] Backport a hugetlb fix for Octeon from 3.18.
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* [mips*] Backport math emulation fix for MIPS32r2 from 3.18.
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-- Ben Hutchings <ben@decadent.org.uk> Sat, 11 Oct 2014 21:41:58 +0100
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linux (3.16.5-1) unstable; urgency=medium
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50
debian/patches/bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch
vendored
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50
debian/patches/bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch
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@ -0,0 +1,50 @@
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From: Markos Chandras <markos.chandras@imgtec.com>
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Date: Tue, 21 Oct 2014 10:21:54 +0100
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Subject: MIPS: cp1emu: Fix ISA restrictions for cop1x_op instructions
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Origin: https://git.kernel.org/linus/a5466d7bba9af83a82cc7c081b2a7d557cde3204
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Commit 08a07904e1828 ("MIPS: math-emu: Remove most ifdefery") removed
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the #ifdef ISA conditions and switched to runtime detection. However,
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according to the instruction set manual, the cop1x_op instructions are
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available in >=MIPS32r2 as well. This fixes a problem on MIPS32r2
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with the ntpd package which failed to execute with a SIGILL exit code due
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to the fact that a madd.d instruction was not being emulated.
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Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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Fixes: 08a07904e1828 ("MIPS: math-emu: Remove most ifdefery")
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Cc: <stable@vger.kernel.org> # v3.16+
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Cc: linux-mips@linux-mips.org
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Reviewed-by: Paul Burton <paul.burton@imgtec.com>
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Reviewed-by: James Hogan <james.hogan@imgtec.com>
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Cc: Markos Chandras <markos.chandras@imgtec.com>
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Patchwork: https://patchwork.linux-mips.org/patch/8173/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/math-emu/cp1emu.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
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index 7a47277..51a0fde 100644
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--- a/arch/mips/math-emu/cp1emu.c
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+++ b/arch/mips/math-emu/cp1emu.c
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@@ -1023,7 +1023,7 @@ emul:
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goto emul;
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case cop1x_op:
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- if (cpu_has_mips_4_5 || cpu_has_mips64)
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+ if (cpu_has_mips_4_5 || cpu_has_mips64 || cpu_has_mips32r2)
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/* its one of ours */
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goto emul;
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@@ -1068,7 +1068,7 @@ emul:
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break;
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case cop1x_op:
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- if (!cpu_has_mips_4_5 && !cpu_has_mips64)
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+ if (!cpu_has_mips_4_5 && !cpu_has_mips64 && !cpu_has_mips32r2)
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return SIGILL;
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sig = fpux_emu(xcp, ctx, ir, fault_addr);
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--
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2.1.1
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90
debian/patches/bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch
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90
debian/patches/bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch
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@ -0,0 +1,90 @@
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From: David Daney <david.daney@cavium.com>
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Date: Mon, 20 Oct 2014 15:34:23 -0700
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Subject: MIPS: tlbex: Properly fix HUGE TLB Refill exception handler
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Origin: https://git.kernel.org/linus/9e0f162a36914937a937358fcb45e0609ef2bfc4
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In commit 8393c524a25609 (MIPS: tlbex: Fix a missing statement for
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HUGETLB), the TLB Refill handler was fixed so that non-OCTEON targets
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would work properly with huge pages. The change was incorrect in that
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it broke the OCTEON case.
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The problem is shown here:
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xxx0: df7a0000 ld k0,0(k1)
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.
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.
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.
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xxxc0: df610000 ld at,0(k1)
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xxxc4: 335a0ff0 andi k0,k0,0xff0
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xxxc8: e825ffcd bbit1 at,0x5,0x0
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xxxcc: 003ad82d daddu k1,at,k0
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.
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.
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.
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In the non-octeon case there is a destructive test for the huge PTE
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bit, and then at 0, $k0 is reloaded (that is what the 8393c524a25609
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patch added).
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In the octeon case, we modify k1 in the branch delay slot, but we
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never need k0 again, so the new load is not needed, but since k1 is
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modified, if we do the load, we load from a garbage location and then
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get a nested TLB Refill, which is seen in userspace as either SIGBUS
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or SIGSEGV (depending on the garbage).
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The real fix is to only do this reloading if it is needed, and never
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where it is harmful.
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Signed-off-by: David Daney <david.daney@cavium.com>
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Cc: Huacai Chen <chenhc@lemote.com>
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Cc: Fuxin Zhang <zhangfx@lemote.com>
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Cc: Zhangjin Wu <wuzhangjin@gmail.com>
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Cc: stable@vger.kernel.org
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/8151/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/mm/tlbex.c | 6 +++++-
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1 file changed, 5 insertions(+), 1 deletion(-)
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diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
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index a08dd53..b5f228e 100644
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--- a/arch/mips/mm/tlbex.c
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+++ b/arch/mips/mm/tlbex.c
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@@ -1062,6 +1062,7 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
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struct mips_huge_tlb_info {
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int huge_pte;
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int restore_scratch;
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+ bool need_reload_pte;
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};
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static struct mips_huge_tlb_info
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@@ -1076,6 +1077,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
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rv.huge_pte = scratch;
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rv.restore_scratch = 0;
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+ rv.need_reload_pte = false;
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if (check_for_high_segbits) {
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UASM_i_MFC0(p, tmp, C0_BADVADDR);
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@@ -1264,6 +1266,7 @@ static void build_r4000_tlb_refill_handler(void)
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} else {
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htlb_info.huge_pte = K0;
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htlb_info.restore_scratch = 0;
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+ htlb_info.need_reload_pte = true;
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vmalloc_mode = refill_noscratch;
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/*
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* create the plain linear handler
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@@ -1300,7 +1303,8 @@ static void build_r4000_tlb_refill_handler(void)
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}
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#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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uasm_l_tlb_huge_update(&l, p);
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- UASM_i_LW(&p, K0, 0, K1);
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+ if (htlb_info.need_reload_pte)
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+ UASM_i_LW(&p, htlb_info.huge_pte, 0, K1);
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build_huge_update_entries(&p, htlb_info.huge_pte, K1);
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build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random,
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htlb_info.restore_scratch);
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--
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2.1.1
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@ -54,6 +54,8 @@ bugfix/m68k/ethernat-kconfig.patch
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bugfix/x86/x86-reject-x32-executables-if-x32-abi-not-supported.patch
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bugfix/s390/s390-3215-fix-hanging-console-issue.patch
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bugfix/arm64/arm64-crypto-fix-makefile-rule-for-aes-glue-.o.patch
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bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch
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bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch
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# Arch features
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features/mips/MIPS-Support-hard-limit-of-cpu-count-nr_cpu_ids.patch
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