diff --git a/debian/changelog b/debian/changelog index 8ca2add7d..fd5f07f76 100644 --- a/debian/changelog +++ b/debian/changelog @@ -34,6 +34,10 @@ linux (3.16.5-2) UNRELEASED; urgency=medium * [armhf] enable RTC, GPIO_PCA953X, SENSORS_G762 and watchdog driver for Netgear ReadyNAS 102/104 + [ Aurelien Jarno ] + * [mips*] Backport a hugetlb fix for Octeon from 3.18. + * [mips*] Backport math emulation fix for MIPS32r2 from 3.18. + -- Ben Hutchings Sat, 11 Oct 2014 21:41:58 +0100 linux (3.16.5-1) unstable; urgency=medium diff --git a/debian/patches/bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch b/debian/patches/bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch new file mode 100644 index 000000000..9ac7f2010 --- /dev/null +++ b/debian/patches/bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch @@ -0,0 +1,50 @@ +From: Markos Chandras +Date: Tue, 21 Oct 2014 10:21:54 +0100 +Subject: MIPS: cp1emu: Fix ISA restrictions for cop1x_op instructions +Origin: https://git.kernel.org/linus/a5466d7bba9af83a82cc7c081b2a7d557cde3204 + +Commit 08a07904e1828 ("MIPS: math-emu: Remove most ifdefery") removed +the #ifdef ISA conditions and switched to runtime detection. However, +according to the instruction set manual, the cop1x_op instructions are +available in >=MIPS32r2 as well. This fixes a problem on MIPS32r2 +with the ntpd package which failed to execute with a SIGILL exit code due +to the fact that a madd.d instruction was not being emulated. + +Signed-off-by: Markos Chandras +Fixes: 08a07904e1828 ("MIPS: math-emu: Remove most ifdefery") +Cc: # v3.16+ +Cc: linux-mips@linux-mips.org +Reviewed-by: Paul Burton +Reviewed-by: James Hogan +Cc: Markos Chandras +Patchwork: https://patchwork.linux-mips.org/patch/8173/ +Signed-off-by: Ralf Baechle +--- + arch/mips/math-emu/cp1emu.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c +index 7a47277..51a0fde 100644 +--- a/arch/mips/math-emu/cp1emu.c ++++ b/arch/mips/math-emu/cp1emu.c +@@ -1023,7 +1023,7 @@ emul: + goto emul; + + case cop1x_op: +- if (cpu_has_mips_4_5 || cpu_has_mips64) ++ if (cpu_has_mips_4_5 || cpu_has_mips64 || cpu_has_mips32r2) + /* its one of ours */ + goto emul; + +@@ -1068,7 +1068,7 @@ emul: + break; + + case cop1x_op: +- if (!cpu_has_mips_4_5 && !cpu_has_mips64) ++ if (!cpu_has_mips_4_5 && !cpu_has_mips64 && !cpu_has_mips32r2) + return SIGILL; + + sig = fpux_emu(xcp, ctx, ir, fault_addr); +-- +2.1.1 + diff --git a/debian/patches/bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch b/debian/patches/bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch new file mode 100644 index 000000000..66c993f88 --- /dev/null +++ b/debian/patches/bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch @@ -0,0 +1,90 @@ +From: David Daney +Date: Mon, 20 Oct 2014 15:34:23 -0700 +Subject: MIPS: tlbex: Properly fix HUGE TLB Refill exception handler +Origin: https://git.kernel.org/linus/9e0f162a36914937a937358fcb45e0609ef2bfc4 + +In commit 8393c524a25609 (MIPS: tlbex: Fix a missing statement for +HUGETLB), the TLB Refill handler was fixed so that non-OCTEON targets +would work properly with huge pages. The change was incorrect in that +it broke the OCTEON case. + +The problem is shown here: + + xxx0: df7a0000 ld k0,0(k1) + . + . + . + xxxc0: df610000 ld at,0(k1) + xxxc4: 335a0ff0 andi k0,k0,0xff0 + xxxc8: e825ffcd bbit1 at,0x5,0x0 + xxxcc: 003ad82d daddu k1,at,k0 + . + . + . + +In the non-octeon case there is a destructive test for the huge PTE +bit, and then at 0, $k0 is reloaded (that is what the 8393c524a25609 +patch added). + +In the octeon case, we modify k1 in the branch delay slot, but we +never need k0 again, so the new load is not needed, but since k1 is +modified, if we do the load, we load from a garbage location and then +get a nested TLB Refill, which is seen in userspace as either SIGBUS +or SIGSEGV (depending on the garbage). + +The real fix is to only do this reloading if it is needed, and never +where it is harmful. + +Signed-off-by: David Daney +Cc: Huacai Chen +Cc: Fuxin Zhang +Cc: Zhangjin Wu +Cc: stable@vger.kernel.org +Cc: linux-mips@linux-mips.org +Patchwork: https://patchwork.linux-mips.org/patch/8151/ +Signed-off-by: Ralf Baechle +--- + arch/mips/mm/tlbex.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c +index a08dd53..b5f228e 100644 +--- a/arch/mips/mm/tlbex.c ++++ b/arch/mips/mm/tlbex.c +@@ -1062,6 +1062,7 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep) + struct mips_huge_tlb_info { + int huge_pte; + int restore_scratch; ++ bool need_reload_pte; + }; + + static struct mips_huge_tlb_info +@@ -1076,6 +1077,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l, + + rv.huge_pte = scratch; + rv.restore_scratch = 0; ++ rv.need_reload_pte = false; + + if (check_for_high_segbits) { + UASM_i_MFC0(p, tmp, C0_BADVADDR); +@@ -1264,6 +1266,7 @@ static void build_r4000_tlb_refill_handler(void) + } else { + htlb_info.huge_pte = K0; + htlb_info.restore_scratch = 0; ++ htlb_info.need_reload_pte = true; + vmalloc_mode = refill_noscratch; + /* + * create the plain linear handler +@@ -1300,7 +1303,8 @@ static void build_r4000_tlb_refill_handler(void) + } + #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT + uasm_l_tlb_huge_update(&l, p); +- UASM_i_LW(&p, K0, 0, K1); ++ if (htlb_info.need_reload_pte) ++ UASM_i_LW(&p, htlb_info.huge_pte, 0, K1); + build_huge_update_entries(&p, htlb_info.huge_pte, K1); + build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random, + htlb_info.restore_scratch); +-- +2.1.1 + diff --git a/debian/patches/series b/debian/patches/series index adbbff578..92c72cc77 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -54,6 +54,8 @@ bugfix/m68k/ethernat-kconfig.patch bugfix/x86/x86-reject-x32-executables-if-x32-abi-not-supported.patch bugfix/s390/s390-3215-fix-hanging-console-issue.patch bugfix/arm64/arm64-crypto-fix-makefile-rule-for-aes-glue-.o.patch +bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch +bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch # Arch features features/mips/MIPS-Support-hard-limit-of-cpu-count-nr_cpu_ids.patch