[mips*el] Fix BPF assembly code for pre-R2 CPUs.
This commit is contained in:
parent
8298497d1b
commit
5c7b00ac36
|
@ -1,11 +1,15 @@
|
||||||
linux (4.2-1~exp2) UNRELEASED; urgency=medium
|
linux (4.2-1~exp2) UNRELEASED; urgency=medium
|
||||||
|
|
||||||
|
[ Ben Hutchings ]
|
||||||
* [mips*el/loongson-3] udeb: Add fb-modules containing radeon driver
|
* [mips*el/loongson-3] udeb: Add fb-modules containing radeon driver
|
||||||
(Closes: #776274)
|
(Closes: #776274)
|
||||||
* [hppa/parisc64-smp,[mips*el/loongson-3] udeb: Add i2c-modules and
|
* [hppa/parisc64-smp,[mips*el/loongson-3] udeb: Add i2c-modules and
|
||||||
make fb-modules depend on it rather than including I2C modules
|
make fb-modules depend on it rather than including I2C modules
|
||||||
directly
|
directly
|
||||||
|
|
||||||
|
[ Aurelien Jarno ]
|
||||||
|
* [mips*el] Fix BPF assembly code for pre-R2 CPUs.
|
||||||
|
|
||||||
-- Ben Hutchings <ben@decadent.org.uk> Wed, 02 Sep 2015 00:29:36 +0100
|
-- Ben Hutchings <ben@decadent.org.uk> Wed, 02 Sep 2015 00:29:36 +0100
|
||||||
|
|
||||||
linux (4.2-1~exp1) experimental; urgency=medium
|
linux (4.2-1~exp1) experimental; urgency=medium
|
||||||
|
|
49
debian/patches/bugfix/mips/bpf-avoid-unreachable-code-on-little-endian.patch
vendored
Normal file
49
debian/patches/bugfix/mips/bpf-avoid-unreachable-code-on-little-endian.patch
vendored
Normal file
|
@ -0,0 +1,49 @@
|
||||||
|
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||||
|
Date: Fri, 4 Sep 2015 16:32:17 +0200
|
||||||
|
Subject: [1/2] MIPS: BPF: Avoid unreachable code on little endian
|
||||||
|
Origin: http://www.linux-mips.org/archives/linux-mips/2015-09/msg00040.html
|
||||||
|
|
||||||
|
On little endian, avoid generating the big endian version of the code
|
||||||
|
by using #else in addition to #ifdef #endif. Also fix one alignment
|
||||||
|
issue wrt delay slot.
|
||||||
|
|
||||||
|
Cc: Ralf Baechle <ralf@linux-mips.org>
|
||||||
|
Cc: Markos Chandras <markos.chandras@imgtec.com>
|
||||||
|
Cc: stable@vger.kernel.org # v4.2+
|
||||||
|
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||||
|
---
|
||||||
|
arch/mips/net/bpf_jit_asm.S | 8 +++++---
|
||||||
|
1 file changed, 5 insertions(+), 3 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/arch/mips/net/bpf_jit_asm.S b/arch/mips/net/bpf_jit_asm.S
|
||||||
|
index e927260..4f54cb1 100644
|
||||||
|
--- a/arch/mips/net/bpf_jit_asm.S
|
||||||
|
+++ b/arch/mips/net/bpf_jit_asm.S
|
||||||
|
@@ -151,9 +151,10 @@ NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
|
||||||
|
wsbh t0, $r_s0
|
||||||
|
jr $r_ra
|
||||||
|
rotr $r_A, t0, 16
|
||||||
|
-#endif
|
||||||
|
+#else
|
||||||
|
jr $r_ra
|
||||||
|
- move $r_A, $r_s0
|
||||||
|
+ move $r_A, $r_s0
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
END(bpf_slow_path_word)
|
||||||
|
|
||||||
|
@@ -162,9 +163,10 @@ NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
|
||||||
|
#ifdef CONFIG_CPU_LITTLE_ENDIAN
|
||||||
|
jr $r_ra
|
||||||
|
wsbh $r_A, $r_s0
|
||||||
|
-#endif
|
||||||
|
+#else
|
||||||
|
jr $r_ra
|
||||||
|
move $r_A, $r_s0
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
END(bpf_slow_path_half)
|
||||||
|
|
||||||
|
--
|
||||||
|
2.1.4
|
||||||
|
|
117
debian/patches/bugfix/mips/bpf-fix-build-on-pre-r2-little-endian-cpus.patch
vendored
Normal file
117
debian/patches/bugfix/mips/bpf-fix-build-on-pre-r2-little-endian-cpus.patch
vendored
Normal file
|
@ -0,0 +1,117 @@
|
||||||
|
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||||
|
Date: Sat, 5 Sep 2015 17:02:59 +0200
|
||||||
|
Subject: [2/2] MIPS: BPF: Fix build on pre-R2 little endian CPUs
|
||||||
|
Origin: http://www.linux-mips.org/archives/linux-mips/2015-09/msg00041.html
|
||||||
|
|
||||||
|
The rotr, seh and wsbh instructions have been introduced with the R2
|
||||||
|
ISA. Thus the current BPF code fails to build on pre-R2 little endian
|
||||||
|
CPUs:
|
||||||
|
|
||||||
|
CC arch/mips/net/bpf_jit.o
|
||||||
|
AS arch/mips/net/bpf_jit_asm.o
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S: Assembler messages:
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:67: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $8,$19'
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:68: Error: opcode not supported on this processor: mips32 (mips32) `rotr $19,$8,16'
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:83: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $8,$19'
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:84: Error: opcode not supported on this processor: mips32 (mips32) `seh $19,$8'
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:151: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $8,$12'
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:153: Error: opcode not supported on this processor: mips32 (mips32) `rotr $19,$8,16'
|
||||||
|
/home/aurel32/linux-4.2/arch/mips/net/bpf_jit_asm.S:164: Error: opcode not supported on this processor: mips32 (mips32) `wsbh $19,$12'
|
||||||
|
/home/aurel32/linux-4.2/scripts/Makefile.build:294: recipe for target 'arch/mips/net/bpf_jit_asm.o' failed
|
||||||
|
|
||||||
|
Fix that by providing equivalent code for these CPUs.
|
||||||
|
|
||||||
|
Cc: Ralf Baechle <ralf@linux-mips.org>
|
||||||
|
Cc: Markos Chandras <markos.chandras@imgtec.com>
|
||||||
|
Cc: stable@vger.kernel.org # v4.2+
|
||||||
|
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||||
|
---
|
||||||
|
arch/mips/net/bpf_jit_asm.S | 42 ++++++++++++++++++++++++++++++++++++++++++
|
||||||
|
1 file changed, 42 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/arch/mips/net/bpf_jit_asm.S b/arch/mips/net/bpf_jit_asm.S
|
||||||
|
index 4f54cb1..dabf417 100644
|
||||||
|
--- a/arch/mips/net/bpf_jit_asm.S
|
||||||
|
+++ b/arch/mips/net/bpf_jit_asm.S
|
||||||
|
@@ -64,8 +64,20 @@ sk_load_word_positive:
|
||||||
|
PTR_ADDU t1, $r_skb_data, offset
|
||||||
|
lw $r_A, 0(t1)
|
||||||
|
#ifdef CONFIG_CPU_LITTLE_ENDIAN
|
||||||
|
+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
|
||||||
|
wsbh t0, $r_A
|
||||||
|
rotr $r_A, t0, 16
|
||||||
|
+# else
|
||||||
|
+ sll t0, $r_A, 24
|
||||||
|
+ srl t1, $r_A, 24
|
||||||
|
+ srl t2, $r_A, 8
|
||||||
|
+ or t0, t0, t1
|
||||||
|
+ andi t2, t2, 0xff00
|
||||||
|
+ andi t1, $r_A, 0xff00
|
||||||
|
+ or t0, t0, t2
|
||||||
|
+ sll t1, t1, 8
|
||||||
|
+ or $r_A, t0, t1
|
||||||
|
+# endif
|
||||||
|
#endif
|
||||||
|
jr $r_ra
|
||||||
|
move $r_ret, zero
|
||||||
|
@@ -80,8 +92,16 @@ sk_load_half_positive:
|
||||||
|
PTR_ADDU t1, $r_skb_data, offset
|
||||||
|
lh $r_A, 0(t1)
|
||||||
|
#ifdef CONFIG_CPU_LITTLE_ENDIAN
|
||||||
|
+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
|
||||||
|
wsbh t0, $r_A
|
||||||
|
seh $r_A, t0
|
||||||
|
+# else
|
||||||
|
+ sll t0, $r_A, 24
|
||||||
|
+ andi t1, $r_A, 0xff00
|
||||||
|
+ sra t0, t0, 16
|
||||||
|
+ srl t1, t1, 8
|
||||||
|
+ or $r_A, t0, t1
|
||||||
|
+# endif
|
||||||
|
#endif
|
||||||
|
jr $r_ra
|
||||||
|
move $r_ret, zero
|
||||||
|
@@ -148,9 +168,22 @@ sk_load_byte_positive:
|
||||||
|
NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
|
||||||
|
bpf_slow_path_common(4)
|
||||||
|
#ifdef CONFIG_CPU_LITTLE_ENDIAN
|
||||||
|
+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
|
||||||
|
wsbh t0, $r_s0
|
||||||
|
jr $r_ra
|
||||||
|
rotr $r_A, t0, 16
|
||||||
|
+# else
|
||||||
|
+ sll t0, $r_s0, 24
|
||||||
|
+ srl t1, $r_s0, 24
|
||||||
|
+ srl t2, $r_s0, 8
|
||||||
|
+ or t0, t0, t1
|
||||||
|
+ andi t2, t2, 0xff00
|
||||||
|
+ andi t1, $r_s0, 0xff00
|
||||||
|
+ or t0, t0, t2
|
||||||
|
+ sll t1, t1, 8
|
||||||
|
+ jr $r_ra
|
||||||
|
+ or $r_A, t0, t1
|
||||||
|
+# endif
|
||||||
|
#else
|
||||||
|
jr $r_ra
|
||||||
|
move $r_A, $r_s0
|
||||||
|
@@ -161,8 +194,17 @@ NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
|
||||||
|
NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
|
||||||
|
bpf_slow_path_common(2)
|
||||||
|
#ifdef CONFIG_CPU_LITTLE_ENDIAN
|
||||||
|
+# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
|
||||||
|
jr $r_ra
|
||||||
|
wsbh $r_A, $r_s0
|
||||||
|
+# else
|
||||||
|
+ sll t0, $r_s0, 8
|
||||||
|
+ andi t1, $r_s0, 0xff00
|
||||||
|
+ andi t0, t0, 0xff00
|
||||||
|
+ srl t1, t1, 8
|
||||||
|
+ jr $r_ra
|
||||||
|
+ or $r_A, t0, t1
|
||||||
|
+# endif
|
||||||
|
#else
|
||||||
|
jr $r_ra
|
||||||
|
move $r_A, $r_s0
|
||||||
|
--
|
||||||
|
2.1.4
|
||||||
|
|
|
@ -46,6 +46,8 @@ debian/qxl-disable-modeset-by-default.patch
|
||||||
|
|
||||||
# Arch bug fixes
|
# Arch bug fixes
|
||||||
bugfix/mips/disable-advansys.patch
|
bugfix/mips/disable-advansys.patch
|
||||||
|
bugfix/mips/bpf-avoid-unreachable-code-on-little-endian.patch
|
||||||
|
bugfix/mips/bpf-fix-build-on-pre-r2-little-endian-cpus.patch
|
||||||
bugfix/arm64/arm64-add-missing-dts-entry-for-X-Gene-platform.patch
|
bugfix/arm64/arm64-add-missing-dts-entry-for-X-Gene-platform.patch
|
||||||
bugfix/arm64/arm64-removed-using-of-the-mask-attribute-in-the-dts.patch
|
bugfix/arm64/arm64-removed-using-of-the-mask-attribute-in-the-dts.patch
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue