[mips*] Only define MAX_PHYSMEM_BITS on Loongson-3, until a better fix
is committed upstream. Fixes Loongson-2 kernel and maybe more. Closes: #764223. svn path=/dists/sid/linux/; revision=21980
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@ -37,6 +37,9 @@ linux (3.16.5-2) UNRELEASED; urgency=medium
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[ Aurelien Jarno ]
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* [mips*] Backport a hugetlb fix for Octeon from 3.18.
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* [mips*] Backport math emulation fix for MIPS32r2 from 3.18.
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* [mips*] Only define MAX_PHYSMEM_BITS on Loongson-3, until a better fix
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is committed upstream. Fixes Loongson-2 kernel and maybe more. Closes:
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#764223.
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-- Ben Hutchings <ben@decadent.org.uk> Sat, 11 Oct 2014 21:41:58 +0100
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24
debian/patches/bugfix/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
vendored
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debian/patches/bugfix/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
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@ -0,0 +1,24 @@
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Commit c4617318 broke Loongson-2 support and maybe even more by increasing
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the value of MAX_PHYSMEM_BITS. At it is currently only needed on
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Loongson-3, define it conditionally.
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Note: this should be replace by upstream fix when available.
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diff --git a/arch/mips/include/asm/sparsemem.h b/arch/mips/include/asm/sparsemem.h
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index b1071c1..778dca7 100644
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--- a/arch/mips/include/asm/sparsemem.h
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+++ b/arch/mips/include/asm/sparsemem.h
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@@ -11,7 +11,12 @@
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#else
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# define SECTION_SIZE_BITS 28
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#endif
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-#define MAX_PHYSMEM_BITS 48
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+
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+#if defined(CONFIG_CPU_LOONGSON3)
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+# define MAX_PHYSMEM_BITS 48
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+#else
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+# define MAX_PHYSMEM_BITS 35
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+#endif
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#endif /* CONFIG_SPARSEMEM */
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#endif /* _MIPS_SPARSEMEM_H */
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@ -56,6 +56,7 @@ bugfix/s390/s390-3215-fix-hanging-console-issue.patch
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bugfix/arm64/arm64-crypto-fix-makefile-rule-for-aes-glue-.o.patch
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bugfix/mips/MIPS-cp1emu-Fix-ISA-restrictions-for-cop1x_op-instru.patch
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bugfix/mips/MIPS-tlbex-Properly-fix-HUGE-TLB-Refill-exception-ha.patch
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bugfix/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch
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# Arch features
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features/mips/MIPS-Support-hard-limit-of-cpu-count-nr_cpu_ids.patch
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