Apply more DRM fixes not yet included in 3.4.y
svn path=/dists/sid/linux/; revision=19790
This commit is contained in:
parent
70e103a57b
commit
1aace03a98
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@ -4,7 +4,6 @@ linux (3.2.38-1) UNRELEASED; urgency=low
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http://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.2.36
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- freezer: PF_FREEZER_NOSIG should be cleared along with PF_NOFREEZE
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(Closes: #697077)
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- drm/i915: add Ivy Bridge GT2 Server entries (Closes: #684767)
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- tmpfs: fix shared mempolicy leak
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- virtio: 9p: correctly pass physical address to userspace for high pages
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- virtio: force vring descriptors to be allocated from lowmem
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@ -14,7 +13,6 @@ linux (3.2.38-1) UNRELEASED; urgency=low
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- ALSA: usb-audio: Avoid autopm calls after disconnection; Fix missing
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autopm for MIDI input (Closes: #664068)
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- target/file: Fix 32-bit highmem breakage for SGL -> iovec mapping
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- drm/i915: Close race between processing unpin task and queueing the flip
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- SCSI: fix Null pointer dereference on disk error
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- proc: pid/status: show all supplementary groups
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- nfsd4: fix oops on unusual readlike compound
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@ -30,7 +28,6 @@ linux (3.2.38-1) UNRELEASED; urgency=low
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- ext4: fix extent tree corruption caused by hole punch
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- jbd2: fix assertion failure in jbd2_journal_flush()
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- tmpfs mempolicy: fix /proc/mounts corrupting memory
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- drm/nouveau: fix init with agpgart-uninorth
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- sparc: huge_ptep_set_* functions need to call set_huge_pte_at()
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- inet: Fix kmemleak in tcp_v4/6_syn_recv_sock and
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dccp_v4/6_request_recv_sock
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@ -142,6 +139,9 @@ linux (3.2.38-1) UNRELEASED; urgency=low
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- [x86] i915: Fixes freezes on Ivy Bridge (Closes: #689268)
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- nouveau: Support for newer nvidia chipsets (Closes: #690284)
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- radeon: Support for HD7000 'Southern Islands' chips
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- [x86] drm/i915: add Ivy Bridge GT2 Server entries (Closes: #684767)
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- [x86] drm/i915: Close race between processing unpin task and queueing
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the flip
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-- Ben Hutchings <ben@decadent.org.uk> Thu, 27 Dec 2012 02:17:44 +0100
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@ -0,0 +1,38 @@
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From: Aaro Koskinen <aaro.koskinen@iki.fi>
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Date: Mon, 31 Dec 2012 03:34:59 +0200
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Subject: drm/nouveau: fix init with agpgart-uninorth
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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commit eda85d6ad490923152544fba0473798b6cc0edf6 upstream.
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Check that the AGP aperture can be mapped. This follows a similar change
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done for Radeon (commit 365048ff, drm/radeon: AGP memory is only I/O if
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the aperture can be mapped by the CPU.).
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The patch fixes the following error seen on G5 iMac:
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nouveau E[ DRM] failed to create kernel channel, -12
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58806
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Reviewed-by: Michel Dänzer <michel@daenzer.net>
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Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
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Signed-off-by: Dave Airlie <airlied@redhat.com>
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[bwh: Backported to 3.2: adjust context]
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Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
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---
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drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
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+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
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@@ -940,7 +940,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo
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if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
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mem->bus.offset = mem->start << PAGE_SHIFT;
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mem->bus.base = dev_priv->gart_info.aper_base;
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- mem->bus.is_iomem = true;
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+ mem->bus.is_iomem = !dev->agp->cant_use_aperture;
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}
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#endif
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break;
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103
debian/patches/bugfix/all/drm-radeon-add-connector-table-for-Mac-G4-Silver.patch
vendored
Normal file
103
debian/patches/bugfix/all/drm-radeon-add-connector-table-for-Mac-G4-Silver.patch
vendored
Normal file
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@ -0,0 +1,103 @@
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From: Alex Deucher <alexander.deucher@amd.com>
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Date: Thu, 20 Dec 2012 16:35:47 -0500
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Subject: drm/radeon: add connector table for Mac G4 Silver
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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commit cafa59b9011a7790be4ddd5979419259844a165d upstream.
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Apple cards do not provide data tables in the vbios
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so we have to hard code the connector parameters
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in the driver.
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|
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Reported-by: Albrecht Dreß <albrecht.dress@arcor.de>
|
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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---
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drivers/gpu/drm/radeon/radeon_combios.c | 51 +++++++++++++++++++++++++++++++
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drivers/gpu/drm/radeon/radeon_mode.h | 3 +-
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2 files changed, 53 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
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index 4af8912..33a56a0 100644
|
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--- a/drivers/gpu/drm/radeon/radeon_combios.c
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+++ b/drivers/gpu/drm/radeon/radeon_combios.c
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@@ -1548,6 +1548,9 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
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of_machine_is_compatible("PowerBook6,7")) {
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/* ibook */
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rdev->mode_info.connector_table = CT_IBOOK;
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+ } else if (of_machine_is_compatible("PowerMac3,5")) {
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+ /* PowerMac G4 Silver radeon 7500 */
|
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+ rdev->mode_info.connector_table = CT_MAC_G4_SILVER;
|
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} else if (of_machine_is_compatible("PowerMac4,4")) {
|
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/* emac */
|
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rdev->mode_info.connector_table = CT_EMAC;
|
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@@ -2212,6 +2215,54 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
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CONNECTOR_OBJECT_ID_SVIDEO,
|
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&hpd);
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break;
|
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+ case CT_MAC_G4_SILVER:
|
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+ DRM_INFO("Connector Table: %d (mac g4 silver)\n",
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+ rdev->mode_info.connector_table);
|
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+ /* DVI-I - tv dac, int tmds */
|
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+ ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
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+ hpd.hpd = RADEON_HPD_1; /* ??? */
|
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+ radeon_add_legacy_encoder(dev,
|
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+ radeon_get_encoder_enum(dev,
|
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+ ATOM_DEVICE_DFP1_SUPPORT,
|
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+ 0),
|
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+ ATOM_DEVICE_DFP1_SUPPORT);
|
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+ radeon_add_legacy_encoder(dev,
|
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+ radeon_get_encoder_enum(dev,
|
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+ ATOM_DEVICE_CRT2_SUPPORT,
|
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+ 2),
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+ ATOM_DEVICE_CRT2_SUPPORT);
|
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+ radeon_add_legacy_connector(dev, 0,
|
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+ ATOM_DEVICE_DFP1_SUPPORT |
|
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+ ATOM_DEVICE_CRT2_SUPPORT,
|
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+ DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
|
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+ CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
|
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+ &hpd);
|
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+ /* VGA - primary dac */
|
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+ ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
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+ hpd.hpd = RADEON_HPD_NONE;
|
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+ radeon_add_legacy_encoder(dev,
|
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+ radeon_get_encoder_enum(dev,
|
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+ ATOM_DEVICE_CRT1_SUPPORT,
|
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+ 1),
|
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+ ATOM_DEVICE_CRT1_SUPPORT);
|
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+ radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT,
|
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+ DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
|
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+ CONNECTOR_OBJECT_ID_VGA,
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+ &hpd);
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+ /* TV - TV DAC */
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+ ddc_i2c.valid = false;
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+ hpd.hpd = RADEON_HPD_NONE;
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+ radeon_add_legacy_encoder(dev,
|
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+ radeon_get_encoder_enum(dev,
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+ ATOM_DEVICE_TV1_SUPPORT,
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+ 2),
|
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+ ATOM_DEVICE_TV1_SUPPORT);
|
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+ radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
|
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+ DRM_MODE_CONNECTOR_SVIDEO,
|
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+ &ddc_i2c,
|
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+ CONNECTOR_OBJECT_ID_SVIDEO,
|
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+ &hpd);
|
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+ break;
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default:
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DRM_INFO("Connector table: %d (invalid)\n",
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rdev->mode_info.connector_table);
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diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
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index d818b50..ed8a0fa 100644
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--- a/drivers/gpu/drm/radeon/radeon_mode.h
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+++ b/drivers/gpu/drm/radeon/radeon_mode.h
|
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@@ -209,7 +209,8 @@ enum radeon_connector_table {
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CT_RN50_POWER,
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CT_MAC_X800,
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CT_MAC_G5_9600,
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- CT_SAM440EP
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+ CT_SAM440EP,
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+ CT_MAC_G4_SILVER
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};
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enum radeon_dvo_chip {
|
112
debian/patches/bugfix/all/drm-radeon-add-connector-table-for-SAM440ep-embedded.patch
vendored
Normal file
112
debian/patches/bugfix/all/drm-radeon-add-connector-table-for-SAM440ep-embedded.patch
vendored
Normal file
|
@ -0,0 +1,112 @@
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From: Alex Deucher <alexander.deucher@amd.com>
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Date: Wed, 2 May 2012 12:10:21 -0400
|
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Subject: drm/radeon: add connector table for SAM440ep embedded board
|
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|
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commit 6a556039e7823d27a0a7f7724d4d455053ea9253 upstream.
|
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|
||||
RV250 found on ppc embedded boards.
|
||||
|
||||
Cc: Hans Verkuil <hverkuil@xs4all.nl>
|
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
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Signed-off-by: Dave Airlie <airlied@redhat.com>
|
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---
|
||||
drivers/gpu/drm/radeon/radeon_combios.c | 66 +++++++++++++++++++++++++++++++
|
||||
drivers/gpu/drm/radeon/radeon_mode.h | 1 +
|
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2 files changed, 67 insertions(+)
|
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|
||||
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
|
||||
index 2cad9fd..576f4f6 100644
|
||||
--- a/drivers/gpu/drm/radeon/radeon_combios.c
|
||||
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
|
||||
@@ -1561,6 +1561,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
||||
(rdev->pdev->subsystem_device == 0x4150)) {
|
||||
/* Mac G5 tower 9600 */
|
||||
rdev->mode_info.connector_table = CT_MAC_G5_9600;
|
||||
+ } else if ((rdev->pdev->device == 0x4c66) &&
|
||||
+ (rdev->pdev->subsystem_vendor == 0x1002) &&
|
||||
+ (rdev->pdev->subsystem_device == 0x4c66)) {
|
||||
+ /* SAM440ep RV250 embedded board */
|
||||
+ rdev->mode_info.connector_table = CT_SAM440EP;
|
||||
} else
|
||||
#endif /* CONFIG_PPC_PMAC */
|
||||
#ifdef CONFIG_PPC64
|
||||
@@ -2134,6 +2139,67 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
||||
CONNECTOR_OBJECT_ID_SVIDEO,
|
||||
&hpd);
|
||||
break;
|
||||
+ case CT_SAM440EP:
|
||||
+ DRM_INFO("Connector Table: %d (SAM440ep embedded board)\n",
|
||||
+ rdev->mode_info.connector_table);
|
||||
+ /* LVDS */
|
||||
+ ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0);
|
||||
+ hpd.hpd = RADEON_HPD_NONE;
|
||||
+ radeon_add_legacy_encoder(dev,
|
||||
+ radeon_get_encoder_enum(dev,
|
||||
+ ATOM_DEVICE_LCD1_SUPPORT,
|
||||
+ 0),
|
||||
+ ATOM_DEVICE_LCD1_SUPPORT);
|
||||
+ radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
|
||||
+ DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
|
||||
+ CONNECTOR_OBJECT_ID_LVDS,
|
||||
+ &hpd);
|
||||
+ /* DVI-I - secondary dac, int tmds */
|
||||
+ ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
+ hpd.hpd = RADEON_HPD_1; /* ??? */
|
||||
+ radeon_add_legacy_encoder(dev,
|
||||
+ radeon_get_encoder_enum(dev,
|
||||
+ ATOM_DEVICE_DFP1_SUPPORT,
|
||||
+ 0),
|
||||
+ ATOM_DEVICE_DFP1_SUPPORT);
|
||||
+ radeon_add_legacy_encoder(dev,
|
||||
+ radeon_get_encoder_enum(dev,
|
||||
+ ATOM_DEVICE_CRT2_SUPPORT,
|
||||
+ 2),
|
||||
+ ATOM_DEVICE_CRT2_SUPPORT);
|
||||
+ radeon_add_legacy_connector(dev, 1,
|
||||
+ ATOM_DEVICE_DFP1_SUPPORT |
|
||||
+ ATOM_DEVICE_CRT2_SUPPORT,
|
||||
+ DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
|
||||
+ CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
|
||||
+ &hpd);
|
||||
+ /* VGA - primary dac */
|
||||
+ ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
+ hpd.hpd = RADEON_HPD_NONE;
|
||||
+ radeon_add_legacy_encoder(dev,
|
||||
+ radeon_get_encoder_enum(dev,
|
||||
+ ATOM_DEVICE_CRT1_SUPPORT,
|
||||
+ 1),
|
||||
+ ATOM_DEVICE_CRT1_SUPPORT);
|
||||
+ radeon_add_legacy_connector(dev, 2,
|
||||
+ ATOM_DEVICE_CRT1_SUPPORT,
|
||||
+ DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
|
||||
+ CONNECTOR_OBJECT_ID_VGA,
|
||||
+ &hpd);
|
||||
+ /* TV - TV DAC */
|
||||
+ ddc_i2c.valid = false;
|
||||
+ hpd.hpd = RADEON_HPD_NONE;
|
||||
+ radeon_add_legacy_encoder(dev,
|
||||
+ radeon_get_encoder_enum(dev,
|
||||
+ ATOM_DEVICE_TV1_SUPPORT,
|
||||
+ 2),
|
||||
+ ATOM_DEVICE_TV1_SUPPORT);
|
||||
+ radeon_add_legacy_connector(dev, 3, ATOM_DEVICE_TV1_SUPPORT,
|
||||
+ DRM_MODE_CONNECTOR_SVIDEO,
|
||||
+ &ddc_i2c,
|
||||
+ CONNECTOR_OBJECT_ID_SVIDEO,
|
||||
+ &hpd);
|
||||
+ break;
|
||||
default:
|
||||
DRM_INFO("Connector table: %d (invalid)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
|
||||
index 0c3cdbd..499a5fe 100644
|
||||
--- a/drivers/gpu/drm/radeon/radeon_mode.h
|
||||
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
|
||||
@@ -210,6 +210,7 @@ enum radeon_connector_table {
|
||||
CT_RN50_POWER,
|
||||
CT_MAC_X800,
|
||||
CT_MAC_G5_9600,
|
||||
+ CT_SAM440EP
|
||||
};
|
||||
|
||||
enum radeon_dvo_chip {
|
26
debian/patches/bugfix/all/drm-radeon-dce32-use-fractional-fb-dividers-for-high.patch
vendored
Normal file
26
debian/patches/bugfix/all/drm-radeon-dce32-use-fractional-fb-dividers-for-high.patch
vendored
Normal file
|
@ -0,0 +1,26 @@
|
|||
From: Alex Deucher <alexander.deucher@amd.com>
|
||||
Date: Tue, 13 Nov 2012 18:03:41 -0500
|
||||
Subject: drm/radeon/dce32+: use fractional fb dividers for high clocks
|
||||
|
||||
commit a02dc74b317d78298cb0587b9b1f6f741fd5c139 upstream.
|
||||
|
||||
Fixes flickering with some high res montiors.
|
||||
|
||||
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
||||
[bwh: Backported to 3.4: use pll->flags instead of radeon_crtc->pll_flags]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
drivers/gpu/drm/radeon/atombios_crtc.c | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
|
||||
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
|
||||
@@ -577,6 +577,8 @@ static u32 atombios_adjust_pll(struct dr
|
||||
/* use frac fb div on APUs */
|
||||
if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev))
|
||||
pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
|
||||
+ if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)
|
||||
+ pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
|
||||
} else {
|
||||
pll->flags |= RADEON_PLL_LEGACY;
|
||||
|
44
debian/patches/bugfix/all/drm-radeon-fix-amd-afusion-gpu-setup-aka-sumo-v2.patch
vendored
Normal file
44
debian/patches/bugfix/all/drm-radeon-fix-amd-afusion-gpu-setup-aka-sumo-v2.patch
vendored
Normal file
|
@ -0,0 +1,44 @@
|
|||
From: Jerome Glisse <jglisse@redhat.com>
|
||||
Date: Tue, 11 Dec 2012 11:56:52 -0500
|
||||
Subject: drm/radeon: fix amd afusion gpu setup aka sumo v2
|
||||
|
||||
commit bd25f0783dc3fb72e1e2779c2b99b2d34b67fa8a upstream.
|
||||
|
||||
Set the proper number of tile pipe that should be a multiple of
|
||||
pipe depending on the number of se engine.
|
||||
|
||||
Fix:
|
||||
https://bugs.freedesktop.org/show_bug.cgi?id=56405
|
||||
https://bugs.freedesktop.org/show_bug.cgi?id=56720
|
||||
|
||||
v2: Don't change sumo2
|
||||
|
||||
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
||||
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
|
||||
[bwh: Backported to 3.2: don't define/use *_GB_ADDR_CONFIG_GOLDEN]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
drivers/gpu/drm/radeon/evergreen.c | 8 ++++----
|
||||
drivers/gpu/drm/radeon/evergreend.h | 2 ++
|
||||
2 files changed, 6 insertions(+), 4 deletions(-)
|
||||
|
||||
--- a/drivers/gpu/drm/radeon/evergreen.c
|
||||
+++ b/drivers/gpu/drm/radeon/evergreen.c
|
||||
@@ -1730,7 +1730,7 @@ static void evergreen_gpu_init(struct ra
|
||||
case CHIP_SUMO:
|
||||
rdev->config.evergreen.num_ses = 1;
|
||||
rdev->config.evergreen.max_pipes = 4;
|
||||
- rdev->config.evergreen.max_tile_pipes = 2;
|
||||
+ rdev->config.evergreen.max_tile_pipes = 4;
|
||||
if (rdev->pdev->device == 0x9648)
|
||||
rdev->config.evergreen.max_simds = 3;
|
||||
else if ((rdev->pdev->device == 0x9647) ||
|
||||
@@ -1819,7 +1819,7 @@ static void evergreen_gpu_init(struct ra
|
||||
break;
|
||||
case CHIP_CAICOS:
|
||||
rdev->config.evergreen.num_ses = 1;
|
||||
- rdev->config.evergreen.max_pipes = 4;
|
||||
+ rdev->config.evergreen.max_pipes = 2;
|
||||
rdev->config.evergreen.max_tile_pipes = 2;
|
||||
rdev->config.evergreen.max_simds = 2;
|
||||
rdev->config.evergreen.max_backends = 1 * rdev->config.evergreen.num_ses;
|
|
@ -0,0 +1,65 @@
|
|||
From: Krzysztof Mazur <krzysiek@podlesie.net>
|
||||
Date: Wed, 19 Dec 2012 11:03:41 +0100
|
||||
Subject: i915: ensure that VGA plane is disabled
|
||||
|
||||
commit 0fde901f1ddd2ce0e380a6444f1fb7ca555859e9 upstream.
|
||||
|
||||
Some broken systems (like HP nc6120) in some cases, usually after LID
|
||||
close/open, enable VGA plane, making display unusable (black screen on LVDS,
|
||||
some strange mode on VGA output). We used to disable VGA plane only once at
|
||||
startup. Now we also check, if VGA plane is still disabled while changing
|
||||
mode, and fix that if something changed it.
|
||||
|
||||
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57434
|
||||
Signed-off-by: Krzysztof Mazur <krzysiek@podlesie.net>
|
||||
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
[bwh: Backported to 3.2: intel_modeset_setup_hw_state() does not
|
||||
exist, so call i915_redisable_vga() directly from intel_lid_notify()]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
--- a/drivers/gpu/drm/i915/intel_display.c
|
||||
+++ b/drivers/gpu/drm/i915/intel_display.c
|
||||
@@ -8898,6 +8898,23 @@ static void i915_disable_vga(struct drm_
|
||||
POSTING_READ(vga_reg);
|
||||
}
|
||||
|
||||
+void i915_redisable_vga(struct drm_device *dev)
|
||||
+{
|
||||
+ struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
+ u32 vga_reg;
|
||||
+
|
||||
+ if (HAS_PCH_SPLIT(dev))
|
||||
+ vga_reg = CPU_VGACNTRL;
|
||||
+ else
|
||||
+ vga_reg = VGACNTRL;
|
||||
+
|
||||
+ if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
|
||||
+ DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
|
||||
+ I915_WRITE(vga_reg, VGA_DISP_DISABLE);
|
||||
+ POSTING_READ(vga_reg);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
void intel_modeset_init(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
--- a/drivers/gpu/drm/i915/i915_drv.h
|
||||
+++ b/drivers/gpu/drm/i915/i915_drv.h
|
||||
@@ -1305,6 +1305,7 @@ static inline void intel_unregister_dsm_
|
||||
#endif /* CONFIG_ACPI */
|
||||
|
||||
/* modesetting */
|
||||
+extern void i915_redisable_vga(struct drm_device *dev);
|
||||
extern void intel_modeset_init(struct drm_device *dev);
|
||||
extern void intel_modeset_gem_init(struct drm_device *dev);
|
||||
extern void intel_modeset_cleanup(struct drm_device *dev);
|
||||
--- a/drivers/gpu/drm/i915/intel_lvds.c
|
||||
+++ b/drivers/gpu/drm/i915/intel_lvds.c
|
||||
@@ -535,6 +535,7 @@ static int intel_lid_notify(struct notif
|
||||
|
||||
mutex_lock(&dev->mode_config.mutex);
|
||||
drm_helper_resume_force_mode(dev);
|
||||
+ i915_redisable_vga(dev);
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
|
||||
return NOTIFY_OK;
|
178
debian/patches/bugfix/x86/drm-i915-Close-race-between-processing-unpin-task-an.patch
vendored
Normal file
178
debian/patches/bugfix/x86/drm-i915-Close-race-between-processing-unpin-task-an.patch
vendored
Normal file
|
@ -0,0 +1,178 @@
|
|||
From: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Date: Mon, 3 Dec 2012 11:36:30 +0000
|
||||
Subject: drm/i915: Close race between processing unpin task and queueing the
|
||||
flip
|
||||
|
||||
commit e7d841ca03b7ab668620045cd7b428eda9f41601 upstream.
|
||||
|
||||
Before queuing the flip but crucially after attaching the unpin-work to
|
||||
the crtc, we continue to setup the unpin-work. However, should the
|
||||
hardware fire early, we see the connected unpin-work and queue the task.
|
||||
The task then promptly runs and unpins the fb before we finish taking
|
||||
the required references or even pinning it... Havoc.
|
||||
|
||||
To close the race, we use the flip-pending atomic to indicate when the
|
||||
flip is finally setup and enqueued. So during the flip-done processing,
|
||||
we can check more accurately whether the flip was expected.
|
||||
|
||||
v2: Add the appropriate mb() to ensure that the writes to the page-flip
|
||||
worker are complete prior to marking it active and emitting the MI_FLIP.
|
||||
On the read side, the mb should be enforced by the spinlocks.
|
||||
|
||||
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
[danvet: Review the barriers a bit, we need a write barrier both
|
||||
before and after updating ->pending. Similarly we need a read barrier
|
||||
in the interrupt handler both before and after reading ->pending. With
|
||||
well-ordered irqs only one barrier in each place should be required,
|
||||
but since this patch explicitly sets out to combat spurious interrupts
|
||||
with is staged activation of the unpin work we need to go full-bore on
|
||||
the barriers, too. Discussed with Chris Wilson on irc and changes
|
||||
acked by him.]
|
||||
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
[bwh: Backported to 3.4: adjust context]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
|
||||
drivers/gpu/drm/i915/i915_irq.c | 4 +++-
|
||||
drivers/gpu/drm/i915/intel_display.c | 39 ++++++++++++++++++++++++++++------
|
||||
drivers/gpu/drm/i915/intel_drv.h | 5 ++++-
|
||||
4 files changed, 41 insertions(+), 11 deletions(-)
|
||||
|
||||
--- a/drivers/gpu/drm/i915/i915_debugfs.c
|
||||
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
|
||||
@@ -340,7 +340,7 @@ static int i915_gem_pageflip_info(struct
|
||||
seq_printf(m, "No flip due on pipe %c (plane %c)\n",
|
||||
pipe, plane);
|
||||
} else {
|
||||
- if (!work->pending) {
|
||||
+ if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
|
||||
seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
|
||||
pipe, plane);
|
||||
} else {
|
||||
@@ -351,7 +351,7 @@ static int i915_gem_pageflip_info(struct
|
||||
seq_printf(m, "Stall check enabled, ");
|
||||
else
|
||||
seq_printf(m, "Stall check waiting for page flip ioctl, ");
|
||||
- seq_printf(m, "%d prepares\n", work->pending);
|
||||
+ seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
|
||||
|
||||
if (work->old_fb_obj) {
|
||||
struct drm_i915_gem_object *obj = work->old_fb_obj;
|
||||
--- a/drivers/gpu/drm/i915/i915_irq.c
|
||||
+++ b/drivers/gpu/drm/i915/i915_irq.c
|
||||
@@ -1251,7 +1251,9 @@ static void i915_pageflip_stall_check(st
|
||||
spin_lock_irqsave(&dev->event_lock, flags);
|
||||
work = intel_crtc->unpin_work;
|
||||
|
||||
- if (work == NULL || work->pending || !work->enable_stall_check) {
|
||||
+ if (work == NULL ||
|
||||
+ atomic_read(&work->pending) >= INTEL_FLIP_COMPLETE ||
|
||||
+ !work->enable_stall_check) {
|
||||
/* Either the pending flip IRQ arrived, or we're too early. Don't check */
|
||||
spin_unlock_irqrestore(&dev->event_lock, flags);
|
||||
return;
|
||||
--- a/drivers/gpu/drm/i915/intel_display.c
|
||||
+++ b/drivers/gpu/drm/i915/intel_display.c
|
||||
@@ -7234,11 +7234,18 @@ static void do_intel_finish_page_flip(st
|
||||
|
||||
spin_lock_irqsave(&dev->event_lock, flags);
|
||||
work = intel_crtc->unpin_work;
|
||||
- if (work == NULL || !work->pending) {
|
||||
+
|
||||
+ /* Ensure we don't miss a work->pending update ... */
|
||||
+ smp_rmb();
|
||||
+
|
||||
+ if (work == NULL || atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
|
||||
spin_unlock_irqrestore(&dev->event_lock, flags);
|
||||
return;
|
||||
}
|
||||
|
||||
+ /* and that the unpin work is consistent wrt ->pending. */
|
||||
+ smp_rmb();
|
||||
+
|
||||
intel_crtc->unpin_work = NULL;
|
||||
|
||||
if (work->event) {
|
||||
@@ -7310,16 +7317,25 @@ void intel_prepare_page_flip(struct drm_
|
||||
to_intel_crtc(dev_priv->plane_to_crtc_mapping[plane]);
|
||||
unsigned long flags;
|
||||
|
||||
+ /* NB: An MMIO update of the plane base pointer will also
|
||||
+ * generate a page-flip completion irq, i.e. every modeset
|
||||
+ * is also accompanied by a spurious intel_prepare_page_flip().
|
||||
+ */
|
||||
spin_lock_irqsave(&dev->event_lock, flags);
|
||||
- if (intel_crtc->unpin_work) {
|
||||
- if ((++intel_crtc->unpin_work->pending) > 1)
|
||||
- DRM_ERROR("Prepared flip multiple times\n");
|
||||
- } else {
|
||||
- DRM_DEBUG_DRIVER("preparing flip with no unpin work?\n");
|
||||
- }
|
||||
+ if (intel_crtc->unpin_work)
|
||||
+ atomic_inc_not_zero(&intel_crtc->unpin_work->pending);
|
||||
spin_unlock_irqrestore(&dev->event_lock, flags);
|
||||
}
|
||||
|
||||
+inline static void intel_mark_page_flip_active(struct intel_crtc *intel_crtc)
|
||||
+{
|
||||
+ /* Ensure that the work item is consistent when activating it ... */
|
||||
+ smp_wmb();
|
||||
+ atomic_set(&intel_crtc->unpin_work->pending, INTEL_FLIP_PENDING);
|
||||
+ /* and that it is marked active as soon as the irq could fire. */
|
||||
+ smp_wmb();
|
||||
+}
|
||||
+
|
||||
static int intel_gen2_queue_flip(struct drm_device *dev,
|
||||
struct drm_crtc *crtc,
|
||||
struct drm_framebuffer *fb,
|
||||
@@ -7356,6 +7372,8 @@ static int intel_gen2_queue_flip(struct
|
||||
OUT_RING(fb->pitches[0]);
|
||||
OUT_RING(obj->gtt_offset + offset);
|
||||
OUT_RING(0); /* aux display base address, unused */
|
||||
+
|
||||
+ intel_mark_page_flip_active(intel_crtc);
|
||||
ADVANCE_LP_RING();
|
||||
return 0;
|
||||
|
||||
@@ -7399,6 +7417,7 @@ static int intel_gen3_queue_flip(struct
|
||||
OUT_RING(obj->gtt_offset + offset);
|
||||
OUT_RING(MI_NOOP);
|
||||
|
||||
+ intel_mark_page_flip_active(intel_crtc);
|
||||
ADVANCE_LP_RING();
|
||||
return 0;
|
||||
|
||||
@@ -7442,6 +7461,10 @@ static int intel_gen4_queue_flip(struct
|
||||
pf = 0;
|
||||
pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
|
||||
OUT_RING(pf | pipesrc);
|
||||
+
|
||||
+ intel_mark_page_flip_active(intel_crtc);
|
||||
+
|
||||
+ intel_mark_page_flip_active(intel_crtc);
|
||||
ADVANCE_LP_RING();
|
||||
return 0;
|
||||
|
||||
@@ -7537,6 +7560,8 @@ static int intel_gen7_queue_flip(struct
|
||||
intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
|
||||
intel_ring_emit(ring, (obj->gtt_offset));
|
||||
intel_ring_emit(ring, (MI_NOOP));
|
||||
+
|
||||
+ intel_mark_page_flip_active(intel_crtc);
|
||||
intel_ring_advance(ring);
|
||||
return 0;
|
||||
|
||||
--- a/drivers/gpu/drm/i915/intel_drv.h
|
||||
+++ b/drivers/gpu/drm/i915/intel_drv.h
|
||||
@@ -277,7 +277,10 @@ struct intel_unpin_work {
|
||||
struct drm_i915_gem_object *old_fb_obj;
|
||||
struct drm_i915_gem_object *pending_flip_obj;
|
||||
struct drm_pending_vblank_event *event;
|
||||
- int pending;
|
||||
+ atomic_t pending;
|
||||
+#define INTEL_FLIP_INACTIVE 0
|
||||
+#define INTEL_FLIP_PENDING 1
|
||||
+#define INTEL_FLIP_COMPLETE 2
|
||||
bool enable_stall_check;
|
||||
};
|
||||
|
62
debian/patches/bugfix/x86/drm-i915-Disable-AsyncFlip-performance-optimisations.patch
vendored
Normal file
62
debian/patches/bugfix/x86/drm-i915-Disable-AsyncFlip-performance-optimisations.patch
vendored
Normal file
|
@ -0,0 +1,62 @@
|
|||
From: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Date: Sun, 20 Jan 2013 16:11:20 +0000
|
||||
Subject: drm/i915: Disable AsyncFlip performance optimisations
|
||||
|
||||
commit 1c8c38c588ea91f8deeae21284840459d1bb58e3 upstream.
|
||||
|
||||
This is a required workarounds for all products, especially on gen6+
|
||||
where it causes the command streamer to fail to parse instructions
|
||||
following a WAIT_FOR_EVENT. We use WAIT_FOR_EVENT for synchronising
|
||||
between the GPU and the display engines, and so this bit being unset may
|
||||
cause hangs.
|
||||
|
||||
References: https://bugzilla.kernel.org/show_bug.cgi?id=52311
|
||||
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Reviewed-by: Imre Deak <imre.deak@intel.com>
|
||||
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
[bwh: Backported to 3.2:
|
||||
- Adjust context
|
||||
- s/_MASKED_BIT/GFX_MODE/]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
drivers/gpu/drm/i915/i915_reg.h | 1 +
|
||||
drivers/gpu/drm/i915/intel_ringbuffer.c | 19 +++++++++++++------
|
||||
2 files changed, 14 insertions(+), 6 deletions(-)
|
||||
|
||||
--- a/drivers/gpu/drm/i915/i915_reg.h
|
||||
+++ b/drivers/gpu/drm/i915/i915_reg.h
|
||||
@@ -400,6 +400,7 @@
|
||||
#define MI_MODE 0x0209c
|
||||
# define VS_TIMER_DISPATCH (1 << 6)
|
||||
# define MI_FLUSH_ENABLE (1 << 12)
|
||||
+# define ASYNC_FLIP_PERF_DISABLE (1 << 14)
|
||||
|
||||
#define GEN6_GT_MODE 0x20d0
|
||||
#define GEN6_GT_MODE_HI (1 << 9)
|
||||
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
|
||||
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
|
||||
@@ -399,12 +399,20 @@ static int init_render_ring(struct intel
|
||||
if (INTEL_INFO(dev)->gen > 3) {
|
||||
int mode = VS_TIMER_DISPATCH << 16 | VS_TIMER_DISPATCH;
|
||||
I915_WRITE(MI_MODE, mode);
|
||||
- if (IS_GEN7(dev))
|
||||
- I915_WRITE(GFX_MODE_GEN7,
|
||||
- GFX_MODE_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
|
||||
- GFX_MODE_ENABLE(GFX_REPLAY_MODE));
|
||||
}
|
||||
|
||||
+ /* We need to disable the AsyncFlip performance optimisations in order
|
||||
+ * to use MI_WAIT_FOR_EVENT within the CS. It should already be
|
||||
+ * programmed to '1' on all products.
|
||||
+ */
|
||||
+ if (INTEL_INFO(dev)->gen >= 6)
|
||||
+ I915_WRITE(MI_MODE, GFX_MODE_ENABLE(ASYNC_FLIP_PERF_DISABLE));
|
||||
+
|
||||
+ if (IS_GEN7(dev))
|
||||
+ I915_WRITE(GFX_MODE_GEN7,
|
||||
+ GFX_MODE_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
|
||||
+ GFX_MODE_ENABLE(GFX_REPLAY_MODE));
|
||||
+
|
||||
if (INTEL_INFO(dev)->gen >= 5) {
|
||||
ret = init_pipe_control(ring);
|
||||
if (ret)
|
36
debian/patches/bugfix/x86/drm-i915-EBUSY-status-handling-added-to-i915_gem_fau.patch
vendored
Normal file
36
debian/patches/bugfix/x86/drm-i915-EBUSY-status-handling-added-to-i915_gem_fau.patch
vendored
Normal file
|
@ -0,0 +1,36 @@
|
|||
From: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
|
||||
Date: Wed, 3 Oct 2012 17:15:26 +0300
|
||||
Subject: drm/i915: EBUSY status handling added to i915_gem_fault().
|
||||
|
||||
commit e79e0fe380847493266fba557217e2773c61bd1b upstream.
|
||||
|
||||
Subsequent threads returning EBUSY from vm_insert_pfn() was not handled
|
||||
correctly. As a result concurrent access from new threads to
|
||||
mmapped data caused SIGBUS.
|
||||
|
||||
Note that this fixes i-g-t/tests/gem_threaded_tiled_access.
|
||||
|
||||
Tested-by: Mika Kuoppala <mika.kuoppala@intel.com>
|
||||
Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
|
||||
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
---
|
||||
drivers/gpu/drm/i915/i915_gem.c | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
|
||||
index 76bbb37..5fa3419 100644
|
||||
--- a/drivers/gpu/drm/i915/i915_gem.c
|
||||
+++ b/drivers/gpu/drm/i915/i915_gem.c
|
||||
@@ -1400,6 +1400,11 @@ out:
|
||||
case 0:
|
||||
case -ERESTARTSYS:
|
||||
case -EINTR:
|
||||
+ case -EBUSY:
|
||||
+ /*
|
||||
+ * EBUSY is ok: this just means that another thread
|
||||
+ * already did the job.
|
||||
+ */
|
||||
return VM_FAULT_NOPAGE;
|
||||
case -ENOMEM:
|
||||
return VM_FAULT_OOM;
|
38
debian/patches/bugfix/x86/drm-i915-GFX_MODE-Flush-TLB-Invalidate-Mode-must-be-.patch
vendored
Normal file
38
debian/patches/bugfix/x86/drm-i915-GFX_MODE-Flush-TLB-Invalidate-Mode-must-be-.patch
vendored
Normal file
|
@ -0,0 +1,38 @@
|
|||
From: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Date: Sun, 20 Jan 2013 16:33:32 +0000
|
||||
Subject: drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for
|
||||
scanline waits
|
||||
|
||||
commit f05bb0c7b624252a5e768287e340e8e45df96e42 upstream.
|
||||
|
||||
On SNB, if bit 13 of GFX_MODE, Flush TLB Invalidate Mode, is not set to 1,
|
||||
the hardware can not program the scanline values. Those scanline values
|
||||
then control when the signal is sent from the display engine to the render
|
||||
ring for MI_WAIT_FOR_EVENTs. Note setting this bit means that TLB
|
||||
invalidations must be performed explicitly through the appropriate bits
|
||||
being set in PIPE_CONTROL.
|
||||
|
||||
References: https://bugzilla.kernel.org/show_bug.cgi?id=52311
|
||||
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
|
||||
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
[bwh: Backported to 3.2: s/_MASKED_BIT/GFX_MODE/]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
|
||||
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
|
||||
@@ -407,6 +407,11 @@ static int init_render_ring(struct intel
|
||||
if (INTEL_INFO(dev)->gen >= 6)
|
||||
I915_WRITE(MI_MODE, GFX_MODE_ENABLE(ASYNC_FLIP_PERF_DISABLE));
|
||||
|
||||
+ /* Required for the hardware to program scanline values for waiting */
|
||||
+ if (INTEL_INFO(dev)->gen == 6)
|
||||
+ I915_WRITE(GFX_MODE,
|
||||
+ GFX_MODE_ENABLE(GFX_TLB_INVALIDATE_ALWAYS));
|
||||
+
|
||||
if (IS_GEN7(dev))
|
||||
I915_WRITE(GFX_MODE_GEN7,
|
||||
GFX_MODE_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
|
40
debian/patches/bugfix/x86/drm-i915-Only-increment-the-user-pin-count-after-suc.patch
vendored
Normal file
40
debian/patches/bugfix/x86/drm-i915-Only-increment-the-user-pin-count-after-suc.patch
vendored
Normal file
|
@ -0,0 +1,40 @@
|
|||
From: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Date: Wed, 2 Jan 2013 10:31:22 +0000
|
||||
Subject: drm/i915; Only increment the user-pin-count after successfully
|
||||
pinning the bo
|
||||
|
||||
commit 93be8788e648817d62fda33e2998eb6ca6ebf3a3 upstream.
|
||||
|
||||
As along the error path we do not correct the user pin-count for the
|
||||
failure, we may end up with userspace believing that it has a pinned
|
||||
object at offset 0 (when interrupted by a signal for example).
|
||||
|
||||
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
[bwh: Backported to 3.2: adjust context]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
drivers/gpu/drm/i915/i915_gem.c | 7 ++++---
|
||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/drivers/gpu/drm/i915/i915_gem.c
|
||||
+++ b/drivers/gpu/drm/i915/i915_gem.c
|
||||
@@ -3456,14 +3456,15 @@ i915_gem_pin_ioctl(struct drm_device *de
|
||||
goto out;
|
||||
}
|
||||
|
||||
- obj->user_pin_count++;
|
||||
- obj->pin_filp = file;
|
||||
- if (obj->user_pin_count == 1) {
|
||||
+ if (obj->user_pin_count == 0) {
|
||||
ret = i915_gem_object_pin(obj, args->alignment, true);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
|
||||
+ obj->user_pin_count++;
|
||||
+ obj->pin_filp = file;
|
||||
+
|
||||
/* XXX - flush the CPU caches for pinned objects
|
||||
* as the X server doesn't manage domains yet
|
||||
*/
|
35
debian/patches/bugfix/x86/drm-i915-dump-UTS_RELEASE-into-the-error_state.patch
vendored
Normal file
35
debian/patches/bugfix/x86/drm-i915-dump-UTS_RELEASE-into-the-error_state.patch
vendored
Normal file
|
@ -0,0 +1,35 @@
|
|||
From: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
Date: Wed, 23 Jan 2013 16:16:35 +0100
|
||||
Subject: drm/i915: dump UTS_RELEASE into the error_state
|
||||
|
||||
commit 4518f611ba21ba165ea3714055938a8984a44ff9 upstream.
|
||||
|
||||
Useful for statistics or on overflowing bug reports to keep things all
|
||||
lined up.
|
||||
|
||||
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
|
||||
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
[bwh: Backported to 3.2: adjust context]
|
||||
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
|
||||
---
|
||||
drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
--- a/drivers/gpu/drm/i915/i915_debugfs.c
|
||||
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
|
||||
@@ -30,6 +30,7 @@
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/export.h>
|
||||
+#include <generated/utsrelease.h>
|
||||
#include "drmP.h"
|
||||
#include "drm.h"
|
||||
#include "intel_drv.h"
|
||||
@@ -755,6 +756,7 @@ static int i915_error_state(struct seq_f
|
||||
|
||||
seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
|
||||
error->time.tv_usec);
|
||||
+ seq_printf(m, "Kernel: " UTS_RELEASE);
|
||||
seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
|
||||
seq_printf(m, "EIR: 0x%08x\n", error->eir);
|
||||
seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
|
69
debian/patches/features/all/drm/efi-Make-efi_enabled-a-function-to-query-EFI-facilit.patch
vendored
Normal file
69
debian/patches/features/all/drm/efi-Make-efi_enabled-a-function-to-query-EFI-facilit.patch
vendored
Normal file
|
@ -0,0 +1,69 @@
|
|||
From: Matt Fleming <matt.fleming@intel.com>
|
||||
Date: Wed, 14 Nov 2012 09:42:35 +0000
|
||||
Subject: efi: Make 'efi_enabled' a function to query EFI facilities
|
||||
|
||||
commit 83e68189745ad931c2afd45d8ee3303929233e7f upstream.
|
||||
|
||||
Originally 'efi_enabled' indicated whether a kernel was booted from
|
||||
EFI firmware. Over time its semantics have changed, and it now
|
||||
indicates whether or not we are booted on an EFI machine with
|
||||
bit-native firmware, e.g. 64-bit kernel with 64-bit firmware.
|
||||
|
||||
The immediate motivation for this patch is the bug report at,
|
||||
|
||||
https://bugs.launchpad.net/ubuntu-cdimage/+bug/1040557
|
||||
|
||||
which details how running a platform driver on an EFI machine that is
|
||||
designed to run under BIOS can cause the machine to become
|
||||
bricked. Also, the following report,
|
||||
|
||||
https://bugzilla.kernel.org/show_bug.cgi?id=47121
|
||||
|
||||
details how running said driver can also cause Machine Check
|
||||
Exceptions. Drivers need a new means of detecting whether they're
|
||||
running on an EFI machine, as sadly the expression,
|
||||
|
||||
if (!efi_enabled)
|
||||
|
||||
hasn't been a sufficient condition for quite some time.
|
||||
|
||||
Users actually want to query 'efi_enabled' for different reasons -
|
||||
what they really want access to is the list of available EFI
|
||||
facilities.
|
||||
|
||||
For instance, the x86 reboot code needs to know whether it can invoke
|
||||
the ResetSystem() function provided by the EFI runtime services, while
|
||||
the ACPI OSL code wants to know whether the EFI config tables were
|
||||
mapped successfully. There are also checks in some of the platform
|
||||
driver code to simply see if they're running on an EFI machine (which
|
||||
would make it a bad idea to do BIOS-y things).
|
||||
|
||||
This patch is a prereq for the samsung-laptop fix patch.
|
||||
|
||||
Cc: David Airlie <airlied@linux.ie>
|
||||
Cc: Corentin Chary <corentincj@iksaif.net>
|
||||
Cc: Matthew Garrett <mjg59@srcf.ucam.org>
|
||||
Cc: Dave Jiang <dave.jiang@intel.com>
|
||||
Cc: Olof Johansson <olof@lixom.net>
|
||||
Cc: Peter Jones <pjones@redhat.com>
|
||||
Cc: Colin Ian King <colin.king@canonical.com>
|
||||
Cc: Steve Langasek <steve.langasek@canonical.com>
|
||||
Cc: Tony Luck <tony.luck@intel.com>
|
||||
Cc: Konrad Rzeszutek Wilk <konrad@kernel.org>
|
||||
Cc: Rafael J. Wysocki <rjw@sisk.pl>
|
||||
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
|
||||
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
|
||||
[bwh: Restricted to drivers/gpu/drm/]
|
||||
---
|
||||
--- a/drivers/gpu/drm/radeon/radeon_device.c
|
||||
+++ b/drivers/gpu/drm/radeon/radeon_device.c
|
||||
@@ -429,7 +429,8 @@ bool radeon_card_posted(struct radeon_device *rdev)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
- if (efi_enabled && rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE)
|
||||
+ if (efi_enabled(EFI_BOOT) &&
|
||||
+ rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE)
|
||||
return false;
|
||||
|
||||
/* first check CRTCs */
|
|
@ -489,3 +489,16 @@ bugfix/x86/drm-i915-add-quirk_invert_brightness-for-ncr-machine.patch
|
|||
bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-g725.patch
|
||||
bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-e725.patch
|
||||
bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-packard-bell-ncl20.patch
|
||||
bugfix/all/drm-nouveau-fix-init-with-agpgart-uninorth.patch
|
||||
bugfix/x86/drm-i915-EBUSY-status-handling-added-to-i915_gem_fau.patch
|
||||
bugfix/x86/drm-i915-Close-race-between-processing-unpin-task-an.patch
|
||||
bugfix/all/drm-radeon-dce32-use-fractional-fb-dividers-for-high.patch
|
||||
bugfix/all/drm-radeon-fix-amd-afusion-gpu-setup-aka-sumo-v2.patch
|
||||
bugfix/all/i915-ensure-that-VGA-plane-is-disabled.patch
|
||||
bugfix/all/drm-radeon-add-connector-table-for-SAM440ep-embedded.patch
|
||||
bugfix/all/drm-radeon-add-connector-table-for-Mac-G4-Silver.patch
|
||||
bugfix/x86/drm-i915-Only-increment-the-user-pin-count-after-suc.patch
|
||||
bugfix/x86/drm-i915-Disable-AsyncFlip-performance-optimisations.patch
|
||||
bugfix/x86/drm-i915-GFX_MODE-Flush-TLB-Invalidate-Mode-must-be-.patch
|
||||
bugfix/x86/drm-i915-dump-UTS_RELEASE-into-the-error_state.patch
|
||||
features/all/drm/efi-Make-efi_enabled-a-function-to-query-EFI-facilit.patch
|
||||
|
|
Loading…
Reference in New Issue