small tool for controlling digital RF step atteunators attached via linux GPIOs
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  1. /*
  2. * GPIO driver for NCT5104D
  3. *
  4. * Author: Tasanakorn Phaipool <tasanakorn@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/gpio.h>
  16. #define DRVNAME "gpio-nct5104d"
  17. /*
  18. * Super-I/O registers
  19. */
  20. #define SIO_LDSEL 0x07 /* Logical device select */
  21. #define SIO_CHIPID 0x20 /* Chaip ID (2 bytes) */
  22. #define SIO_GPIO_ENABLE 0x30 /* GPIO enable */
  23. #define SIO_GPIO1_MODE 0xE0 /* GPIO1 Mode OpenDrain/Push-Pull */
  24. #define SIO_GPIO2_MODE 0xE1 /* GPIO2 Mode OpenDrain/Push-Pull */
  25. #define SIO_LD_GPIO 0x07 /* GPIO logical device */
  26. #define SIO_LD_GPIO_MODE 0x0F /* GPIO mode control device */
  27. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  28. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  29. #define SIO_NCT5104D_ID 0x1061 /* Chip ID */
  30. #define SIO_PCENGINES_APU_NCT5104D_ID 0xc452 /* Chip ID */
  31. enum chips { nct5104d };
  32. static const char * const nct5104d_names[] = {
  33. "nct5104d"
  34. };
  35. struct nct5104d_sio {
  36. int addr;
  37. enum chips type;
  38. };
  39. struct nct5104d_gpio_bank {
  40. struct gpio_chip chip;
  41. unsigned int regbase;
  42. struct nct5104d_gpio_data *data;
  43. };
  44. struct nct5104d_gpio_data {
  45. struct nct5104d_sio *sio;
  46. int nr_bank;
  47. struct nct5104d_gpio_bank *bank;
  48. };
  49. /*
  50. * Super-I/O functions.
  51. */
  52. static inline int superio_inb(int base, int reg)
  53. {
  54. outb(reg, base);
  55. return inb(base + 1);
  56. }
  57. static int superio_inw(int base, int reg)
  58. {
  59. int val;
  60. outb(reg++, base);
  61. val = inb(base + 1) << 8;
  62. outb(reg, base);
  63. val |= inb(base + 1);
  64. return val;
  65. }
  66. static inline void superio_outb(int base, int reg, int val)
  67. {
  68. outb(reg, base);
  69. outb(val, base + 1);
  70. }
  71. static inline int superio_enter(int base)
  72. {
  73. /* Don't step on other drivers' I/O space by accident. */
  74. if (!request_muxed_region(base, 2, DRVNAME)) {
  75. pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
  76. return -EBUSY;
  77. }
  78. /* According to the datasheet the key must be send twice. */
  79. outb(SIO_UNLOCK_KEY, base);
  80. outb(SIO_UNLOCK_KEY, base);
  81. return 0;
  82. }
  83. static inline void superio_select(int base, int ld)
  84. {
  85. outb(SIO_LDSEL, base);
  86. outb(ld, base + 1);
  87. }
  88. static inline void superio_exit(int base)
  89. {
  90. outb(SIO_LOCK_KEY, base);
  91. release_region(base, 2);
  92. }
  93. /*
  94. * GPIO chip.
  95. */
  96. static int nct5104d_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
  97. static int nct5104d_gpio_get(struct gpio_chip *chip, unsigned offset);
  98. static int nct5104d_gpio_direction_out(struct gpio_chip *chip,
  99. unsigned offset, int value);
  100. static void nct5104d_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
  101. #define NCT5104D_GPIO_BANK(_base, _ngpio, _regbase) \
  102. { \
  103. .chip = { \
  104. .label = DRVNAME, \
  105. .owner = THIS_MODULE, \
  106. .direction_input = nct5104d_gpio_direction_in, \
  107. .get = nct5104d_gpio_get, \
  108. .direction_output = nct5104d_gpio_direction_out, \
  109. .set = nct5104d_gpio_set, \
  110. .base = _base, \
  111. .ngpio = _ngpio, \
  112. .can_sleep = true, \
  113. }, \
  114. .regbase = _regbase, \
  115. }
  116. #define gpio_dir(base) (base + 0)
  117. #define gpio_data(base) (base + 1)
  118. static struct nct5104d_gpio_bank nct5104d_gpio_bank[] = {
  119. NCT5104D_GPIO_BANK(0 , 8, 0xE0),
  120. NCT5104D_GPIO_BANK(10, 8, 0xE4)
  121. };
  122. static int nct5104d_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
  123. {
  124. int err;
  125. struct nct5104d_gpio_bank *bank =
  126. container_of(chip, struct nct5104d_gpio_bank, chip);
  127. struct nct5104d_sio *sio = bank->data->sio;
  128. u8 dir;
  129. err = superio_enter(sio->addr);
  130. if (err)
  131. return err;
  132. superio_select(sio->addr, SIO_LD_GPIO);
  133. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  134. dir |= (1 << offset);
  135. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  136. superio_exit(sio->addr);
  137. return 0;
  138. }
  139. static int nct5104d_gpio_get(struct gpio_chip *chip, unsigned offset)
  140. {
  141. int err;
  142. struct nct5104d_gpio_bank *bank =
  143. container_of(chip, struct nct5104d_gpio_bank, chip);
  144. struct nct5104d_sio *sio = bank->data->sio;
  145. u8 data;
  146. err = superio_enter(sio->addr);
  147. if (err)
  148. return err;
  149. superio_select(sio->addr, SIO_LD_GPIO);
  150. data = superio_inb(sio->addr, gpio_data(bank->regbase));
  151. superio_exit(sio->addr);
  152. return !!(data & 1 << offset);
  153. }
  154. static int nct5104d_gpio_direction_out(struct gpio_chip *chip,
  155. unsigned offset, int value)
  156. {
  157. int err;
  158. struct nct5104d_gpio_bank *bank =
  159. container_of(chip, struct nct5104d_gpio_bank, chip);
  160. struct nct5104d_sio *sio = bank->data->sio;
  161. u8 dir, data_out;
  162. err = superio_enter(sio->addr);
  163. if (err)
  164. return err;
  165. superio_select(sio->addr, SIO_LD_GPIO);
  166. data_out = superio_inb(sio->addr, gpio_data(bank->regbase));
  167. if (value)
  168. data_out |= (1 << offset);
  169. else
  170. data_out &= ~(1 << offset);
  171. superio_outb(sio->addr, gpio_data(bank->regbase), data_out);
  172. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  173. dir &= ~(1 << offset);
  174. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  175. superio_exit(sio->addr);
  176. return 0;
  177. }
  178. static void nct5104d_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  179. {
  180. int err;
  181. struct nct5104d_gpio_bank *bank =
  182. container_of(chip, struct nct5104d_gpio_bank, chip);
  183. struct nct5104d_sio *sio = bank->data->sio;
  184. u8 data_out;
  185. err = superio_enter(sio->addr);
  186. if (err)
  187. return;
  188. superio_select(sio->addr, SIO_LD_GPIO);
  189. data_out = superio_inb(sio->addr, gpio_data(bank->regbase));
  190. if (value)
  191. data_out |= (1 << offset);
  192. else
  193. data_out &= ~(1 << offset);
  194. superio_outb(sio->addr, gpio_data(bank->regbase), data_out);
  195. superio_exit(sio->addr);
  196. }
  197. /*
  198. * Platform device and driver.
  199. */
  200. static int nct5104d_gpio_probe(struct platform_device *pdev)
  201. {
  202. int err;
  203. int i;
  204. struct nct5104d_sio *sio = pdev->dev.platform_data;
  205. struct nct5104d_gpio_data *data;
  206. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  207. if (!data)
  208. return -ENOMEM;
  209. switch (sio->type) {
  210. case nct5104d:
  211. data->nr_bank = ARRAY_SIZE(nct5104d_gpio_bank);
  212. data->bank = nct5104d_gpio_bank;
  213. break;
  214. default:
  215. return -ENODEV;
  216. }
  217. data->sio = sio;
  218. platform_set_drvdata(pdev, data);
  219. /* For each GPIO bank, register a GPIO chip. */
  220. for (i = 0; i < data->nr_bank; i++) {
  221. struct nct5104d_gpio_bank *bank = &data->bank[i];
  222. bank->chip.dev = &pdev->dev;
  223. bank->data = data;
  224. err = gpiochip_add(&bank->chip);
  225. if (err) {
  226. dev_err(&pdev->dev,
  227. "Failed to register gpiochip %d: %d\n",
  228. i, err);
  229. goto err_gpiochip;
  230. }
  231. }
  232. return 0;
  233. err_gpiochip:
  234. for (i = i - 1; i >= 0; i--) {
  235. struct nct5104d_gpio_bank *bank = &data->bank[i];
  236. int tmp;
  237. //tmp = gpiochip_remove(&bank->chip);
  238. gpiochip_remove(&bank->chip);
  239. tmp = 0;
  240. if (tmp < 0)
  241. dev_err(&pdev->dev,
  242. "Failed to remove gpiochip %d: %d\n",
  243. i, tmp);
  244. }
  245. return err;
  246. }
  247. static int nct5104d_gpio_remove(struct platform_device *pdev)
  248. {
  249. int err;
  250. int i;
  251. struct nct5104d_gpio_data *data = platform_get_drvdata(pdev);
  252. for (i = 0; i < data->nr_bank; i++) {
  253. struct nct5104d_gpio_bank *bank = &data->bank[i];
  254. //err = gpiochip_remove(&bank->chip);
  255. gpiochip_remove(&bank->chip);
  256. err = 0;
  257. if (err) {
  258. dev_err(&pdev->dev,
  259. "Failed to remove GPIO gpiochip %d: %d\n",
  260. i, err);
  261. return err;
  262. }
  263. }
  264. return 0;
  265. }
  266. static int __init nct5104d_find(int addr, struct nct5104d_sio *sio)
  267. {
  268. int err;
  269. u16 devid;
  270. u8 gpio_cfg;
  271. err = superio_enter(addr);
  272. if (err)
  273. return err;
  274. err = -ENODEV;
  275. devid = superio_inw(addr, SIO_CHIPID);
  276. switch (devid) {
  277. case SIO_NCT5104D_ID:
  278. case SIO_PCENGINES_APU_NCT5104D_ID:
  279. sio->type = nct5104d;
  280. /* enable GPIO0 and GPIO1 */
  281. superio_select(addr, SIO_LD_GPIO);
  282. gpio_cfg = superio_inb(addr, SIO_GPIO_ENABLE);
  283. gpio_cfg |= 0x03;
  284. superio_outb(addr, SIO_GPIO_ENABLE, gpio_cfg);
  285. break;
  286. default:
  287. pr_info(DRVNAME ": Unsupported device 0x%04x\n", devid);
  288. goto err;
  289. }
  290. sio->addr = addr;
  291. err = 0;
  292. pr_info(DRVNAME ": Found %s at %#x chip id 0x%04x\n",
  293. nct5104d_names[sio->type],
  294. (unsigned int) addr,
  295. (int) superio_inw(addr, SIO_CHIPID));
  296. superio_select(sio->addr, SIO_LD_GPIO_MODE);
  297. superio_outb(sio->addr, SIO_GPIO1_MODE, 0x0);
  298. superio_outb(sio->addr, SIO_GPIO2_MODE, 0x0);
  299. err:
  300. superio_exit(addr);
  301. return err;
  302. }
  303. static struct platform_device *nct5104d_gpio_pdev;
  304. static int __init
  305. nct5104d_gpio_device_add(const struct nct5104d_sio *sio)
  306. {
  307. int err;
  308. nct5104d_gpio_pdev = platform_device_alloc(DRVNAME, -1);
  309. if (!nct5104d_gpio_pdev)
  310. pr_err(DRVNAME ": Error platform_device_alloc\n");
  311. if (!nct5104d_gpio_pdev)
  312. return -ENOMEM;
  313. err = platform_device_add_data(nct5104d_gpio_pdev,
  314. sio, sizeof(*sio));
  315. if (err) {
  316. pr_err(DRVNAME "Platform data allocation failed\n");
  317. goto err;
  318. }
  319. err = platform_device_add(nct5104d_gpio_pdev);
  320. if (err) {
  321. pr_err(DRVNAME "Device addition failed\n");
  322. goto err;
  323. }
  324. pr_info(DRVNAME ": Device added\n");
  325. return 0;
  326. err:
  327. platform_device_put(nct5104d_gpio_pdev);
  328. return err;
  329. }
  330. /*
  331. */
  332. static struct platform_driver nct5104d_gpio_driver = {
  333. .driver = {
  334. .owner = THIS_MODULE,
  335. .name = DRVNAME,
  336. },
  337. .probe = nct5104d_gpio_probe,
  338. .remove = nct5104d_gpio_remove,
  339. };
  340. static int __init nct5104d_gpio_init(void)
  341. {
  342. int err;
  343. struct nct5104d_sio sio;
  344. if (nct5104d_find(0x2e, &sio) &&
  345. nct5104d_find(0x4e, &sio))
  346. return -ENODEV;
  347. err = platform_driver_register(&nct5104d_gpio_driver);
  348. if (!err) {
  349. pr_info(DRVNAME ": platform_driver_register\n");
  350. err = nct5104d_gpio_device_add(&sio);
  351. if (err)
  352. platform_driver_unregister(&nct5104d_gpio_driver);
  353. }
  354. return err;
  355. }
  356. subsys_initcall(nct5104d_gpio_init);
  357. static void __exit nct5104d_gpio_exit(void)
  358. {
  359. platform_device_unregister(nct5104d_gpio_pdev);
  360. platform_driver_unregister(&nct5104d_gpio_driver);
  361. }
  362. module_exit(nct5104d_gpio_exit);
  363. MODULE_DESCRIPTION("GPIO driver for Super-I/O chips NCT5104D");
  364. MODULE_AUTHOR("Tasanakorn Phaipool <tasanakorn@gmail.com>");
  365. MODULE_LICENSE("GPL");