171 lines
4.2 KiB
Makefile
171 lines
4.2 KiB
Makefile
LIBDIR = ../lib
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BINDIR = ../bin
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#
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# The full path of output lib file (e.g. ../lib/libapp.a).
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#
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LIB = $($(APP)_LIB)
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#
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# The full path of output executable file (e.g. ../bin/app.exe).
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#
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EXE = $($(APP)_EXE)
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#
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# Source directory
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#
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SRCDIR = $($(APP)_SRCDIR)
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#
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# Output directory for object files (i.e. output/target)
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#
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OBJDIR = output/$(app)-$(TARGET_NAME)
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ifeq ($(OS_NAME),linux-kernel)
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export $(APP)_CFLAGS += -DKBUILD_MODNAME=$(app) -DKBUILD_BASENAME=$(app)
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endif
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#
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# OBJS is ./output/target/file.o
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#
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OBJS = $(foreach file, $($(APP)_OBJS), $(OBJDIR)/$(file))
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OBJDIRS := $(sort $(dir $(OBJS)))
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#
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# FULL_SRCS is ../src/app/file1.c ../src/app/file1.S
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#
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FULL_SRCS = $(foreach file, $($(APP)_OBJS), $(SRCDIR)/$(basename $(file)).c $(SRCDIR)/$(basename $(file)).cpp $(SRCDIR)/$(basename $(file)).S)
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#
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# When generating dependency (gcc -MM), ideally we use only either
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# CFLAGS or CXXFLAGS (not both). But I just couldn't make if/ifeq to work.
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#
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DEPFLAGS = $($(APP)_CXXFLAGS) $($(APP)_CFLAGS)
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# Dependency file
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DEP_FILE := .$(app)-$(TARGET_NAME).depend
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print_common:
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@echo "###"
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@echo "### DUMPING MAKE VARIABLES (I WON'T DO ANYTHING ELSE):"
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@echo "###"
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@echo APP=$(APP)
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@echo OBJDIR=$(OBJDIR)
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@echo OBJDIRS=$(OBJDIRS)
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@echo OBJS=$(OBJS)
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@echo SRCDIR=$(SRCDIR)
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@echo FULL_SRCS=$(FULL_SRCS)
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@echo $(APP)_CFLAGS=$($(APP)_CFLAGS)
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@echo $(APP)_CXXFLAGS=$($(APP)_CXXFLAGS)
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@echo $(APP)_LDFLAGS=$($(APP)_LDFLAGS)
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@echo DEPFLAGS=$(DEPFLAGS)
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print_bin: print_common
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@echo EXE=$(EXE)
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@echo BINDIR=$(BINDIR)
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print_lib: print_common
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@echo LIB=$(LIB)
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@echo LIBDIR=$(LIBDIR)
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$(LIB): $(LIBDIR) $(OBJDIRS) $(OBJS) $($(APP)_EXTRA_DEP)
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$(AR)$(LIB) $(OBJS)
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$(RANLIB) $(LIB)
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$(EXE): $(BINDIR) $(OBJDIRS) $(OBJS) $($(APP)_EXTRA_DEP)
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$(LD) $(LDOUT)$(subst /,$(HOST_PSEP),$(EXE)) \
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$(subst /,$(HOST_PSEP),$(OBJS)) $($(APP)_LDFLAGS)
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$(OBJDIR)/$(app).o: $(OBJDIRS) $(OBJS)
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$(CROSS_COMPILE)ld -r -o $@ $(OBJS)
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$(OBJDIR)/$(app).ko: $(OBJDIR)/$(app).o
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@echo Creating kbuild Makefile...
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@echo "# Our module name:" > $(OBJDIR)/Makefile
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@echo 'obj-m += $(app).o' >> $(OBJDIR)/Makefile
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@echo >> $(OBJDIR)/Makefile
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@echo "# Object members:" >> $(OBJDIR)/Makefile
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@echo -n '$(app)-objs += ' >> $(OBJDIR)/Makefile
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@for file in $($(APP)_OBJS); do \
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echo -n "$$file " >> $(OBJDIR)/Makefile; \
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done
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@echo >> $(OBJDIR)/Makefile
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@echo >> $(OBJDIR)/Makefile
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@echo "# Prevent .o files to be built by kbuild:" >> $(OBJDIR)/Makefile
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@for file in $($(APP)_OBJS); do \
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echo ".PHONY: `pwd`/$(OBJDIR)/$$file" >> $(OBJDIR)/Makefile; \
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done
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@echo >> $(OBJDIR)/Makefile
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@echo all: >> $(OBJDIR)/Makefile
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@echo -e "\tmake -C $(KERNEL_DIR) M=`pwd`/$(OBJDIR) modules $(KERNEL_ARCH)" >> $(OBJDIR)/Makefile
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@echo Invoking kbuild...
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make -C $(OBJDIR)
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../lib/$(app).ko: $(LIB) $(OBJDIR)/$(app).ko
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cp $(OBJDIR)/$(app).ko ../lib
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$(OBJDIR)/%$(OBJEXT): $(SRCDIR)/%.c
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$(CC) $($(APP)_CFLAGS) \
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$(CC_OUT)$(subst /,$(HOST_PSEP),$@) \
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$(subst /,$(HOST_PSEP),$<)
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$(OBJDIR)/%$(OBJEXT): $(SRCDIR)/%.S
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$(CC) $($(APP)_CFLAGS) \
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$(CC_OUT)$(subst /,$(HOST_PSEP),$@) \
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$(subst /,$(HOST_PSEP),$<)
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$(OBJDIR)/%$(OBJEXT): $(SRCDIR)/%.cpp
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$(CC) $($(APP)_CXXFLAGS) \
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$(CC_OUT)$(subst /,$(HOST_PSEP),$@) \
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$(subst /,$(HOST_PSEP),$<)
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$(OBJDIRS):
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$(subst @@,$(subst /,$(HOST_PSEP),$@),$(HOST_MKDIR))
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$(LIBDIR):
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$(subst @@,$(subst /,$(HOST_PSEP),$(LIBDIR)),$(HOST_MKDIR))
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$(BINDIR):
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$(subst @@,$(subst /,$(HOST_PSEP),$(BINDIR)),$(HOST_MKDIR))
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clean:
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$(subst @@,$(subst /,$(HOST_PSEP),$(OBJDIR)/*),$(HOST_RMR))
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$(subst @@,$(subst /,$(HOST_PSEP),$(OBJDIR)),$(HOST_RMDIR))
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ifeq ($(OS_NAME),linux-kernel)
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rm -f ../lib/$(app).o
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endif
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gcov-report:
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for file in $(FULL_SRCS); do \
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gcov $$file -n -o $(OBJDIR); \
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done
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realclean: clean
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$(subst @@,$(subst /,$(HOST_PSEP),$(LIB)) $(subst /,$(HOST_PSEP),$(EXE)),$(HOST_RM))
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$(subst @@,$(DEP_FILE),$(HOST_RM))
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ifeq ($(OS_NAME),linux-kernel)
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rm -f ../lib/$(app).ko
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endif
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depend:
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$(subst @@,$(DEP_FILE),$(HOST_RM))
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for F in $(FULL_SRCS); do \
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if test -f $$F; then \
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echo "$(OBJDIR)/" | tr -d '\n' >> $(DEP_FILE); \
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if $(CC_NAME) -M $(DEPFLAGS) $$F | sed '/^#/d' >> $(DEP_FILE); then \
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true; \
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else \
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echo 'err:' >> $(DEP_FILE); \
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rm -f $(DEP_FILE); \
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exit 1; \
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fi; \
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fi; \
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done;
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dep: depend
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-include $(DEP_FILE)
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