135 lines
3.5 KiB
Diff
135 lines
3.5 KiB
Diff
--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -12,10 +12,12 @@
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*/
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#include <linux/phy.h>
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+#include <linux/mdio.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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+#include <linux/platform_data/phy-at803x.h>
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#define AT803X_INTR_ENABLE 0x12
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#define AT803X_INTR_STATUS 0x13
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@@ -28,10 +30,61 @@
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#define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
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#define AT803X_FUNC_DATA 0x4003
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+#define AT803X_PCS_SMART_EEE_CTRL3 0x805D
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+
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+#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_MASK 0x3
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+#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT 12
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+#define AT803X_SMART_EEE_CTRL3_LPI_EN BIT(8)
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+
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+#define AT803X_DEBUG_PORT_ACCESS_OFFSET 0x1D
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+#define AT803X_DEBUG_PORT_ACCESS_DATA 0x1E
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+
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+#define AT803X_DBG0_REG 0x00
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+#define AT803X_DBG0_RGMII_RX_CLK_DELAY_EN BIT(8)
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+
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+#define AT803X_DBG5_REG 0x05
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+#define AT803X_DBG5_RGMII_TX_CLK_DELAY_EN BIT(8)
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+
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MODULE_DESCRIPTION("Atheros 803x PHY driver");
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MODULE_AUTHOR("Matus Ujhelyi");
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MODULE_LICENSE("GPL");
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+static u16
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+at803x_dbg_reg_rmw(struct phy_device *phydev, u16 reg, u16 clear, u16 set)
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+{
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+ struct mii_bus *bus = phydev->bus;
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+ int val;
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+
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+ mutex_lock(&bus->mdio_lock);
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+
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+ bus->write(bus, phydev->addr, AT803X_DEBUG_PORT_ACCESS_OFFSET, reg);
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+ val = bus->read(bus, phydev->addr, AT803X_DEBUG_PORT_ACCESS_DATA);
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+ if (val < 0) {
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+ val = 0xffff;
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+ goto out;
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+ }
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+
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+ val &= ~clear;
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+ val |= set;
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+ bus->write(bus, phydev->addr, AT803X_DEBUG_PORT_ACCESS_DATA, val);
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+
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+out:
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+ mutex_unlock(&bus->mdio_lock);
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+ return val;
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+}
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+
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+static inline void
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+at803x_dbg_reg_set(struct phy_device *phydev, u16 reg, u16 set)
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+{
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+ at803x_dbg_reg_rmw(phydev, reg, 0, set);
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+}
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+
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+static inline void
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+at803x_dbg_reg_clr(struct phy_device *phydev, u16 reg, u16 clear)
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+{
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+ at803x_dbg_reg_rmw(phydev, reg, clear, 0);
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+}
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+
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static void at803x_set_wol_mac_addr(struct phy_device *phydev)
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{
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struct net_device *ndev = phydev->attached_dev;
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@@ -62,8 +115,16 @@ static void at803x_set_wol_mac_addr(stru
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}
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}
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+static void at803x_disable_smarteee(struct phy_device *phydev)
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+{
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+ phy_write_mmd(phydev, MDIO_MMD_PCS, AT803X_PCS_SMART_EEE_CTRL3,
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+ 1 << AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT);
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+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0);
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+}
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+
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static int at803x_config_init(struct phy_device *phydev)
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{
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+ struct at803x_platform_data *pdata;
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int val;
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u32 features;
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int status;
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@@ -105,6 +166,26 @@ static int at803x_config_init(struct phy
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status = phy_write(phydev, AT803X_INTR_ENABLE, AT803X_WOL_ENABLE);
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status = phy_read(phydev, AT803X_INTR_STATUS);
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+ pdata = dev_get_platdata(&phydev->dev);
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+ if (pdata) {
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+ if (pdata->disable_smarteee)
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+ at803x_disable_smarteee(phydev);
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+
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+ if (pdata->enable_rgmii_rx_delay)
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+ at803x_dbg_reg_set(phydev, AT803X_DBG0_REG,
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+ AT803X_DBG0_RGMII_RX_CLK_DELAY_EN);
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+ else
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+ at803x_dbg_reg_clr(phydev, AT803X_DBG0_REG,
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+ AT803X_DBG0_RGMII_RX_CLK_DELAY_EN);
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+
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+ if (pdata->enable_rgmii_tx_delay)
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+ at803x_dbg_reg_set(phydev, AT803X_DBG5_REG,
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+ AT803X_DBG5_RGMII_TX_CLK_DELAY_EN);
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+ else
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+ at803x_dbg_reg_clr(phydev, AT803X_DBG5_REG,
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+ AT803X_DBG5_RGMII_TX_CLK_DELAY_EN);
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+ }
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+
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return 0;
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}
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--- /dev/null
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+++ b/include/linux/platform_data/phy-at803x.h
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@@ -0,0 +1,10 @@
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+#ifndef _PHY_AT803X_PDATA_H
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+#define _PHY_AT803X_PDATA_H
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+
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+struct at803x_platform_data {
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+ int disable_smarteee:1;
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+ int enable_rgmii_tx_delay:1;
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+ int enable_rgmii_rx_delay:1;
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+};
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+
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+#endif /* _PHY_AT803X_PDATA_H */
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