* openssl update
* hostapd: fix remote denial of service vulnerability in WMM action frame parsing
* kernel: remove the netfilter optimization that skips the filter table, it has caused too many issues
* ath9k: fix a beacon enable handling bug
* minor bugfixes and board backports
Partitions are generated depending on the size of the flash chip.
The layout on which the partition based is hardcoded into the module.
Using this new partition layout it makes possible to have 8mb and 16mb within
the same board definition.
export_netdevs will export a net device for every port. These netdev represent a port
with out traffic.
When such a device is broght down via ifconfig the port is shutdown and
vice versa. Carrier sense is working too and ethtool can be used to
control advertise, autoneg, ...
Please also backport to Barrier Breaker (this same patch applies there too).
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@44645 3c298f89-4303-0410-b956-a3cf2f4a3e73
Port0 is uplink/PD port (IDC)
Port1-3 are downink/PSE ports (IDC)
Port4 is admin port (RJ45)
* we only have 8 MByte flash
* we use the hardware LEDs for switch ports 1-5
The image boots and is able to establish links on both eth0 and eth1.
However, the LED support is not yet working as expected.
This patch fixes LED definitions for the DRAGINO2 board.
1. It renames the Router/USB led to System, as it is now marked "SYS" on the board.
2. It gives control of the LAN and WAN leds and some other GPIOs to Linux.
3. It fixes the active_low property for the LAN and WAN leds.
4. It sets up WLAN, LAN and WAN leds in the UCI defaults.
5. It allows usage of the System led by the diag.sh script, so it will be used to indicate boot and failsafe status.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
Backport of r42897
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@43867 3c298f89-4303-0410-b956-a3cf2f4a3e73
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Backport of r42955
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42956 3c298f89-4303-0410-b956-a3cf2f4a3e73
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Backport of r42457
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42475 3c298f89-4303-0410-b956-a3cf2f4a3e73
While the AR9331 has a gigabit MAC towards the internal switch, the
integrated PHYs however are only 100-base-tx capable. The existing code
however advertieses gigabit capability in the link status word. If you
attach such a PHY to a gigabit capable switch on the remote end, with
some probability it attempts to negotiate gigabit and fails, falling
baco to the AR9331 assuming a 10mbit half-duplex link. This has been
observed quite frequently with the Carambola2 and gigabit capable
switches.
In ath79_register_eth(), "pdata->has_gbit = 1;" is set unconditionally
for both AR9331 ethernet ports. This is most likely wrong. Despite the
two MAC IP cores being gigabit MACs, the MAC for eth1 is connected to a
100base-T PHY via MII. The has_gbit attribute is used in the ethernet
driver to determine the supported link modes.
So either pdata->has_gbit is not set to 1 anymore, or the ethernet
driver needs to be modified to determine the advertised link code word
on another criteria than pdata->has_gbit. This patch implements the
former solution.
Signed-off-by: Harald Welte <laforge@gnumonks.org>
Backport of r42432
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@42434 3c298f89-4303-0410-b956-a3cf2f4a3e73
Alexander Couzens
blogic
Harald Welte
nbd
rmilecki