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350 lines
8.0 KiB
350 lines
8.0 KiB
/* |
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* arch/arm/mach-spear3xx/spear300.c |
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* |
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* SPEAr300 machine source file |
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* |
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* Copyright (C) 2009-2012 ST Microelectronics |
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* Viresh Kumar <viresh.linux@gmail.com> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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#define pr_fmt(fmt) "SPEAr300: " fmt |
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#include <linux/amba/pl08x.h> |
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#include <linux/of_platform.h> |
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#include <asm/hardware/vic.h> |
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#include <asm/mach/arch.h> |
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#include <plat/shirq.h> |
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#include <mach/generic.h> |
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#include <mach/spear.h> |
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/* Base address of various IPs */ |
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#define SPEAR300_TELECOM_BASE UL(0x50000000) |
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/* Interrupt registers offsets and masks */ |
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#define SPEAR300_INT_ENB_MASK_REG 0x54 |
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#define SPEAR300_INT_STS_MASK_REG 0x58 |
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#define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0) |
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#define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1) |
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#define SPEAR300_I2S_IRQ_MASK (1 << 2) |
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#define SPEAR300_TDM_IRQ_MASK (1 << 3) |
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#define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4) |
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#define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5) |
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#define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6) |
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#define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7) |
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#define SPEAR300_GPIO1_IRQ_MASK (1 << 8) |
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#define SPEAR300_SHIRQ_RAS1_MASK 0x1FF |
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#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000) |
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/* SPEAr300 Virtual irq definitions */ |
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/* IRQs sharing IRQ_GEN_RAS_1 */ |
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#define SPEAR300_VIRQ_IT_PERS_S (SPEAR3XX_VIRQ_START + 0) |
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#define SPEAR300_VIRQ_IT_CHANGE_S (SPEAR3XX_VIRQ_START + 1) |
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#define SPEAR300_VIRQ_I2S (SPEAR3XX_VIRQ_START + 2) |
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#define SPEAR300_VIRQ_TDM (SPEAR3XX_VIRQ_START + 3) |
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#define SPEAR300_VIRQ_CAMERA_L (SPEAR3XX_VIRQ_START + 4) |
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#define SPEAR300_VIRQ_CAMERA_F (SPEAR3XX_VIRQ_START + 5) |
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#define SPEAR300_VIRQ_CAMERA_V (SPEAR3XX_VIRQ_START + 6) |
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#define SPEAR300_VIRQ_KEYBOARD (SPEAR3XX_VIRQ_START + 7) |
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#define SPEAR300_VIRQ_GPIO1 (SPEAR3XX_VIRQ_START + 8) |
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/* IRQs sharing IRQ_GEN_RAS_3 */ |
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#define SPEAR300_IRQ_CLCD SPEAR3XX_IRQ_GEN_RAS_3 |
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/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ |
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#define SPEAR300_IRQ_SDHCI SPEAR3XX_IRQ_INTRCOMM_RAS_ARM |
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/* spear3xx shared irq */ |
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static struct shirq_dev_config shirq_ras1_config[] = { |
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{ |
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.virq = SPEAR300_VIRQ_IT_PERS_S, |
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.enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK, |
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.status_mask = SPEAR300_IT_PERS_S_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_IT_CHANGE_S, |
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.enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK, |
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.status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_I2S, |
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.enb_mask = SPEAR300_I2S_IRQ_MASK, |
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.status_mask = SPEAR300_I2S_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_TDM, |
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.enb_mask = SPEAR300_TDM_IRQ_MASK, |
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.status_mask = SPEAR300_TDM_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_CAMERA_L, |
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.enb_mask = SPEAR300_CAMERA_L_IRQ_MASK, |
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.status_mask = SPEAR300_CAMERA_L_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_CAMERA_F, |
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.enb_mask = SPEAR300_CAMERA_F_IRQ_MASK, |
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.status_mask = SPEAR300_CAMERA_F_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_CAMERA_V, |
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.enb_mask = SPEAR300_CAMERA_V_IRQ_MASK, |
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.status_mask = SPEAR300_CAMERA_V_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_KEYBOARD, |
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.enb_mask = SPEAR300_KEYBOARD_IRQ_MASK, |
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.status_mask = SPEAR300_KEYBOARD_IRQ_MASK, |
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}, { |
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.virq = SPEAR300_VIRQ_GPIO1, |
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.enb_mask = SPEAR300_GPIO1_IRQ_MASK, |
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.status_mask = SPEAR300_GPIO1_IRQ_MASK, |
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}, |
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}; |
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static struct spear_shirq shirq_ras1 = { |
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.irq = SPEAR3XX_IRQ_GEN_RAS_1, |
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.dev_config = shirq_ras1_config, |
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.dev_count = ARRAY_SIZE(shirq_ras1_config), |
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.regs = { |
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.enb_reg = SPEAR300_INT_ENB_MASK_REG, |
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.status_reg = SPEAR300_INT_STS_MASK_REG, |
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.status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK, |
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.clear_reg = -1, |
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}, |
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}; |
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/* DMAC platform data's slave info */ |
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struct pl08x_channel_data spear300_dma_info[] = { |
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{ |
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.bus_id = "uart0_rx", |
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.min_signal = 2, |
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.max_signal = 2, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "uart0_tx", |
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.min_signal = 3, |
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.max_signal = 3, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ssp0_rx", |
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.min_signal = 8, |
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.max_signal = 8, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ssp0_tx", |
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.min_signal = 9, |
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.max_signal = 9, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "i2c_rx", |
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.min_signal = 10, |
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.max_signal = 10, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "i2c_tx", |
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.min_signal = 11, |
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.max_signal = 11, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "irda", |
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.min_signal = 12, |
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.max_signal = 12, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "adc", |
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.min_signal = 13, |
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.max_signal = 13, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "to_jpeg", |
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.min_signal = 14, |
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.max_signal = 14, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "from_jpeg", |
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.min_signal = 15, |
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.max_signal = 15, |
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.muxval = 0, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras0_rx", |
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.min_signal = 0, |
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.max_signal = 0, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras0_tx", |
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.min_signal = 1, |
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.max_signal = 1, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras1_rx", |
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.min_signal = 2, |
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.max_signal = 2, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras1_tx", |
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.min_signal = 3, |
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.max_signal = 3, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras2_rx", |
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.min_signal = 4, |
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.max_signal = 4, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras2_tx", |
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.min_signal = 5, |
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.max_signal = 5, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras3_rx", |
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.min_signal = 6, |
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.max_signal = 6, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras3_tx", |
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.min_signal = 7, |
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.max_signal = 7, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras4_rx", |
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.min_signal = 8, |
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.max_signal = 8, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras4_tx", |
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.min_signal = 9, |
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.max_signal = 9, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras5_rx", |
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.min_signal = 10, |
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.max_signal = 10, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras5_tx", |
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.min_signal = 11, |
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.max_signal = 11, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras6_rx", |
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.min_signal = 12, |
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.max_signal = 12, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras6_tx", |
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.min_signal = 13, |
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.max_signal = 13, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras7_rx", |
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.min_signal = 14, |
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.max_signal = 14, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, { |
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.bus_id = "ras7_tx", |
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.min_signal = 15, |
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.max_signal = 15, |
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.muxval = 1, |
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.cctl = 0, |
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.periph_buses = PL08X_AHB1, |
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}, |
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}; |
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/* Add SPEAr300 auxdata to pass platform data */ |
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static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { |
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OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, |
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&pl022_plat_data), |
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OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, |
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&pl080_plat_data), |
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{} |
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}; |
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static void __init spear300_dt_init(void) |
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{ |
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int ret; |
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pl080_plat_data.slave_channels = spear300_dma_info; |
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pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info); |
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of_platform_populate(NULL, of_default_bus_match_table, |
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spear300_auxdata_lookup, NULL); |
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/* shared irq registration */ |
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shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K); |
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if (shirq_ras1.regs.base) { |
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ret = spear_shirq_register(&shirq_ras1); |
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if (ret) |
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pr_err("Error registering Shared IRQ\n"); |
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} |
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} |
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static const char * const spear300_dt_board_compat[] = { |
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"st,spear300", |
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"st,spear300-evb", |
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NULL, |
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}; |
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static void __init spear300_map_io(void) |
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{ |
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spear3xx_map_io(); |
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} |
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DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree") |
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.map_io = spear300_map_io, |
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.init_irq = spear3xx_dt_init_irq, |
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.handle_irq = vic_handle_irq, |
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.timer = &spear3xx_timer, |
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.init_machine = spear300_dt_init, |
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.restart = spear_restart, |
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.dt_compat = spear300_dt_board_compat, |
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MACHINE_END
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