diff --git a/board.h b/board.h
index 1f21c44..7f2ad8d 100644
--- a/board.h
+++ b/board.h
@@ -37,4 +37,9 @@
 	PINMUX1_ASP
 #endif
 
+#if defined(board_sysmobts_v2)
+#  define PINMUX0_DEFAULT 0x0000000F
+#  define PINMUX1_DEFAULT PINMUX1_UART0 | PINMUX1_UART1
+#endif
+
 #endif /* _BOARD_H_ */
diff --git a/davinci.c b/davinci.c
index 2a96c58..04234e8 100644
--- a/davinci.c
+++ b/davinci.c
@@ -620,13 +620,26 @@ davinci_platform_init(char *version)
 	char boardCfg;
 	boardCfg = (*gpio01 >> 10) & 0x001F;
 	boardVer = (*gpio01 >> 15) & 0x0007;
-	if ( (boardVer == 1) && ((boardCfg == 0x02) || (boardCfg == 0x04) || (boardCfg == 0x05)) )
+	if ( boardVer > 1 )
 	{
 		/* Davinci @ 405/810 MHz */
 		pllCfg = PLL_DAVINCI_810_CFG;
 
 		/* Micron MT47H64M16HR-3IT @ 189 MHz */
 		ddrCfg = DDR_MT47H64M16HR_3IT_189MHz_CFG;
+
+		uart_send_str_lf("CPU: Davinci @ 405/810 MHz");
+		uart_send_str_lf("DDR: Micron MT47H64M16HR-3IT @ 189 MHz");
+	} else if ( (boardVer == 1) && ((boardCfg == 0x02) || (boardCfg == 0x04) || (boardCfg == 0x05)) )
+	{
+		/* Davinci @ 405/810 MHz */
+		pllCfg = PLL_DAVINCI_810_CFG;
+
+		/* Micron MT47H64M16HR-3IT @ 189 MHz */
+		ddrCfg = DDR_MT47H64M16HR_3IT_189MHz_CFG;
+
+		uart_send_str_lf("CPU: Davinci @ 405/810 MHz");
+		uart_send_str_lf("DDR: Micron MT47H64M16HR-3IT @ 189 MHz");
 	}
 	else if ( (boardVer == 0) && (boardCfg != 0x00) )
 	{
@@ -637,6 +650,9 @@ davinci_platform_init(char *version)
 
 		/* Micron MT47H32M16BN-3 @ 162 MHz */
 		ddrCfg = DDR_MT47H64M16HR_3IT_162MHz_CFG;
+
+		uart_send_str_lf("CPU: Davinci @ 297/594 MHz");
+		uart_send_str_lf("DDR: Micron MT47H32M16BN-3 @ 162 MHz");
 	}
 	else
 #endif
@@ -652,6 +668,9 @@ davinci_platform_init(char *version)
 
 		/* Micron MT47H32M16BN-3 @ 162 MHz */
 		ddrCfg = DDR_MT47H32M16BN_3_162MHz_CFG;
+
+		uart_send_str_lf("CPU: Davinci @ 297/594 MHz");
+		uart_send_str_lf("DDR: Micron MT47H32M16BN-3 @ 162 MHz");
 	}
 
 	if (status == E_PASS)