761 lines
19 KiB
C
761 lines
19 KiB
C
/*
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* (C) Copyright 2001
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* Denis Peter, MPL AG Switzerland
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Note: Parts of these software are imported from
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* - UBL, The Universal Talkware Boot Loader
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* Copyright (C) 2000 Universal Talkware Inc.
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* - Linux
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*
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*
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*/
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#include <common.h>
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#ifdef CONFIG_VIDEO
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#include <command.h>
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#include <asm/processor.h>
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#include <devices.h>
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#include "video.h"
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#include <pci.h>
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#include "vga_table.h"
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#ifdef CONFIG_VIDEO_CT69000
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#define VIDEO_VEND_ID 0x102C
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#define VIDEO_DEV_ID 0x00C0
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#else
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#error CONFIG_VIDEO_CT69000 must be defined
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#endif
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/*
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* Routine for resent board info to video
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* resides in pip405.c
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*/
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extern void video_write_board_info(void);
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#undef VGA_DEBUG
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#ifdef VGA_DEBUG
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#define PRINTF(fmt,args...) printf (fmt ,##args)
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#else
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#define PRINTF(fmt,args...)
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#endif
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#define VGA_MAXROWS 25
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#define VGA_MAXCOLS 80
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#define CRTC_CURSH 14 /* cursor high pos */
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#define CRTC_CURSL 15 /* cursor low pos */
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/* description of the hardware layout */
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#define ATTRI_INDEX CFG_ISA_IO_BASE_ADDRESS | 0x3c0 /* Index and Data write port of the attribute Registers */
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#define ATTRI_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3c1 /* Data port of the attribute Registers */
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#define STATUS_REG0 CFG_ISA_IO_BASE_ADDRESS | 0x3c2 /* Status Register 0 (read only) */
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#define MSR_REG_W CFG_ISA_IO_BASE_ADDRESS | 0x3c2 /* Misc. Output Register (write only) */
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#define SEQ_INDEX CFG_ISA_IO_BASE_ADDRESS | 0x3c4 /* Index port of the Sequencer Controller */
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#define SEQ_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3c5 /* Data port of the Sequencer Controller */
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#define COL_PAL_MASK CFG_ISA_IO_BASE_ADDRESS | 0x3c6 /* Color Palette Mask */
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#define COL_PAL_STAT CFG_ISA_IO_BASE_ADDRESS | 0x3c7 /* Color Palette Status (read only) */
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#define COL_PAL_IND_R CFG_ISA_IO_BASE_ADDRESS | 0x3c7 /* Color Palette Read Mode Index (write only) */
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#define COL_PAL_IND_W CFG_ISA_IO_BASE_ADDRESS | 0x3c8 /* Color Palette Write Mode Index */
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#define COL_PAL_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3c9 /* Color Palette Data Port */
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#define FCR_REG_R CFG_ISA_IO_BASE_ADDRESS | 0x3ca /* Feature Control Register (read only) */
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#define MSR_REG_R CFG_ISA_IO_BASE_ADDRESS | 0x3cc /* Misc. Output Register (read only) */
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#define GR_INDEX CFG_ISA_IO_BASE_ADDRESS | 0x3ce /* Index port of the Graphic Controller Registers */
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#define GR_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3cf /* Data port of the Graphic Controller Registers */
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#define FP_INDEX CFG_ISA_IO_BASE_ADDRESS | 0x3d0 /* Index port of the Flat panel Registers */
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#define FP_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3d1 /* Data port of the Flat panel Registers */
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#define MR_INDEX CFG_ISA_IO_BASE_ADDRESS | 0x3d2 /* Index Port of the Multimedia Extension */
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#define MR_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3d3 /* Data Port of the Multimedia Extension */
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#define CRT_INDEX CFG_ISA_IO_BASE_ADDRESS | 0x3d4 /* Index port of the CRT Controller */
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#define CRT_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3d5 /* Data port of the CRT Controller */
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#define XREG_INDEX CFG_ISA_IO_BASE_ADDRESS | 0x3d6 /* Extended Register index */
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#define XREG_DATA CFG_ISA_IO_BASE_ADDRESS | 0x3d7 /* Extended Register data */
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#define STATUS_REG1 CFG_ISA_IO_BASE_ADDRESS | 0x3da /* Input Status Register 1 (read only) */
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#define FCR_REG_W CFG_ISA_IO_BASE_ADDRESS | 0x3da /* Feature Control Register (write only) */
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static unsigned char * video_fb; /* Frame buffer */
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/* current hardware state */
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static int video_row;
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static int video_col;
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static unsigned char video_attr;
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static unsigned int font_base_addr;
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/**********************************************************************
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* some forward declerations...
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*/
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int video_init(int busdevfunc);
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void vga_set_attrib(void);
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void vga_set_crt(void);
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void vga_set_dac(void);
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void vga_set_gr(void);
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void vga_set_seq(void);
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void vga_set_xreg(void);
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void vga_write_sr(unsigned char reg,unsigned char val);
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void vga_write_gr(unsigned char reg,unsigned char val);
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void vga_write_cr(unsigned char reg,unsigned char val);
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void vga_set_font(void);
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/***************************************************************************
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* Init VGA Device
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*/
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int drv_video_init (void)
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{
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int error, devices = 1 ;
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device_t vgadev ;
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int busdevfunc;
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busdevfunc=pci_find_device(VIDEO_VEND_ID,VIDEO_DEV_ID,0); /* get PCI Device ID */
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if(busdevfunc==-1) {
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#ifdef CONFIG_VIDEO_ONBOARD
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printf("Error VGA Controller (%04X,%04X) not found\n",VIDEO_VEND_ID,VIDEO_DEV_ID);
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#endif
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return -1;
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}
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video_init(busdevfunc);
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video_write_board_info();
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memset (&vgadev, 0, sizeof(vgadev));
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strcpy(vgadev.name, "vga");
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vgadev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM;
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vgadev.putc = video_putc;
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vgadev.puts = video_puts;
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vgadev.getc = NULL;
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vgadev.tstc = NULL;
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error = device_register (&vgadev);
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return (error == 0) ? devices : error ;
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}
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/***********************************************************
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* VGA Initializing
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*/
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int video_init(int busdevfunc)
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{
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pci_read_config_dword(busdevfunc, PCI_BASE_ADDRESS_0, &font_base_addr);
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video_fb = (char*)font_base_addr; /* we look into the big linaer memory area */
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/* set the extended Registers */
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vga_set_xreg();
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/* set IO Addresses to 0x3Dx (color mode ) */
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out8(MSR_REG_W,0x01);
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/* Feature Control Register:
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Bits 7-4 Reserved = 0
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Bit 3 Vertical Sync select = 1 = Enabled
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Bits 2-0 Reserved = 010 = as read from memory.
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*/
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out8(FCR_REG_W,0x02);
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/* Miscelaneous output Register:
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Bits 7-6 (num lines) = 01 = VGA 400 lines,
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Bit 5 (Odd/Even Page) = 1 = Sleect high page of memory,
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Bit 4 reserved = 0,
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Bits 3-2 (Clocl Select) = 01 = 28.322Mhz
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Bit 1 = Display Ram Enable = 1 = Enable processor access.
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Bit 0 = Io Address Select = 1 = Color Graphics Enulation.
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*/
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out8(MSR_REG_W,0x67);
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/* set the palette */
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vga_set_dac();
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/* set the attributes (before we bring up the engine
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then we dont have to wait for refresh).
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*/
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vga_set_attrib();
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/* set the crontroller register. */
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vga_set_crt();
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vga_write_sr(0x00,0x01); /* synchronous reset */
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vga_write_sr(0x01,0x00); /* clocking mode */
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vga_write_sr(0x02,0x03); /* write to map 0, 1 */
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vga_write_sr(0x03,0x00); /* select character map 0 */
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vga_write_sr(0x04,0x03); /* even-odd addressing */
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vga_write_sr(0x00,0x03); /* clear synchronous reset */
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vga_set_seq(); /* Set the extended sr's. */
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vga_set_gr(); /* Set the graphic registers. */
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/* load the font */
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vga_set_font();
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/* initialize the rol/col counts and the text attribute. */
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video_row=0;
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video_col=0;
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video_attr = VGA_ATTR_CLR_WHT;
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/* Clear the video ram */
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video_clear();
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return 1;
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}
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void vga_set_font(void)
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{
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int i,j;
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char *fontmap;
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fontmap = (char *)font_base_addr;
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vga_write_sr(0x00,0x01); /* synchronous reset */
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vga_write_sr(0x04,0x06); /* sequential addressing */
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vga_write_sr(0x02,0x04); /* write to map 2 */
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vga_write_sr(0x00,0x03); /* clear synchronous reset */
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vga_write_gr(0x04,0x02); /* select map 2 */
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vga_write_gr(0x05,0x00); /* disable odd-even addressing */
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vga_write_gr(0x06,0x00); /* map start at 0xa0000 */
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for(i=0;i<0x100;i++) {
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for(j=0;j<0x10;j++) {
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*((char *)fontmap+i*32+j)=(char)fontdata_8x16[i*16+j];
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}
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}
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vga_write_sr(0x00,0x01); /* synchronous reset */
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vga_write_sr(0x02,0x03); /* write to map 0 and 1 */
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vga_write_sr(0x04,0x03); /* odd-even addressing */
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vga_write_sr(0x03,0x00); /* Character map 0 & 1 */
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vga_write_sr(0x00,0x03); /* clear synchronous reset */
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vga_write_gr(0x04,0x00); /* select map 0 for CPU */
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vga_write_gr(0x05,0x10); /* enable odd-even addressing */
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vga_write_gr(0x06,0x0E); /* map start at 0xb8000 */
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}
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/* since we are BIG endian, swap attributes and char */
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unsigned short vga_swap_short(unsigned short val)
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{
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unsigned short swapped;
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swapped = ((val & 0xff)<<8) | ((val & 0xff00)>>8);
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return swapped;
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}
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/****************************************************
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* Routines usable Outside world
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*/
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/* scolls the text up row rows */
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void video_scroll(int row)
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{
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unsigned short clear = ((unsigned short)video_attr << 8) | (' ');
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unsigned short* addr16 = &((unsigned short *)video_fb)[(VGA_MAXROWS-row)*VGA_MAXCOLS];
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int i;
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clear=vga_swap_short(clear);
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memcpy(video_fb, video_fb+row*(VGA_MAXCOLS*2), (VGA_MAXROWS-row)*(VGA_MAXCOLS*2));
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for (i = 0 ; i < row * VGA_MAXCOLS ; i++)
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addr16[i] = clear;
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video_row-=row;
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video_col=0;
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}
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unsigned long video_cursor(int col, int row)
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{
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unsigned short off = row * VGA_MAXCOLS + col ;
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unsigned long saved = (video_col << 16) | (video_row & 0xFFFF);
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video_col = col;
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video_row = row;
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vga_write_cr(CRTC_CURSH,(unsigned char)((off & 0xff00)>>8)); /* Cursor pos. high */
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vga_write_cr(CRTC_CURSL,(unsigned char)(off & 0xff)); /* Cursor pos. low */
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return saved;
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}
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void video_set_lxy(unsigned long lxy)
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{
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int col = (lxy >> 16) & 0xFFFF;
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int row = lxy & 0xFFFF;
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video_cursor(col,row);
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}
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unsigned long video_get_lxy(void)
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{
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return (video_col << 16) | (video_row & 0xFFFF);
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}
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void video_clear(void)
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{
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int i;
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unsigned short clear = ((unsigned short)video_attr << 8) | (' ');
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unsigned short * addr16 = (unsigned short * )video_fb;
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clear=vga_swap_short(clear);
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video_row = video_col = 0;
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for (i = 0 ; i < 2000 ; i++) {
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addr16[i] = clear;
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}
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}
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void video_copy(unsigned short *buffer)
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{
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int i;
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unsigned short * addr16 = (unsigned short * )video_fb;
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for (i = 0 ; i < 2000 ; i++) {
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buffer[i] = addr16[i];
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}
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}
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void video_write(unsigned short *buffer)
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{
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int i;
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unsigned short * addr16 = (unsigned short *)video_fb;
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for (i = 0 ; i < 2000 ; i++) {
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addr16[i] = buffer[i];
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}
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}
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void video_putc(char ch)
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{
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char* addr;
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#if 0
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char buf[48];
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char buf1[16];
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static int i=0;
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sprintf(buf1,"%02X ",ch);
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serial_puts(buf1);
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buf[i++]=((ch>=0x20)&&(ch<=0x7f)) ? ch : '.';
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if(i>=16) {
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buf[i++]='\n';
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buf[i]='\0';
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i=0;
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serial_puts(" ");
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serial_puts(buf);
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}
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#endif
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switch (ch) {
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case '\n':
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video_col=0;
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video_row++;
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break;
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case '\r':
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video_col=0;
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break;
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case '\t':
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video_col += 8 - video_col % 8;
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break;
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case '\a':
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/* beep(); */
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break;
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case '\b':
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if(video_col)
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video_col--;
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else
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return;
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break;
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default:
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addr = video_fb + 2 * video_row * 80 + 2 * video_col;
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*((char *)addr+1) = (char) video_attr;
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*((char *)addr) = (char) ch;
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video_col++;
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if (video_col > (VGA_MAXCOLS-1)) {
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video_row++;
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video_col=0;
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}
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}
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/* If we're on the bottom of the secreen, wrap one row */
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if (video_row > (VGA_MAXROWS-1))
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video_scroll(1);
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video_cursor(video_col, video_row);
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}
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unsigned char video_set_attr(unsigned char attr)
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{
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unsigned char saved_attr = video_attr;
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video_attr = attr;
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return saved_attr;
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}
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unsigned char video_set_attr_xy(unsigned char attr, int x, int y)
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{
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unsigned char *addr = video_fb + (x * 80 + y) * 2 + 1;
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unsigned char saved_attr = *addr;
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*addr = attr;
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return saved_attr;
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}
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/* put char at xy */
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void video_putc_xy(char ch, int x, int y)
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{
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video_col = x;
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video_row = y;
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video_putc(ch);
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}
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/* put char at xy relative to the position */
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void video_putc_rxy(char ch, int x, int y)
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{
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video_col += x;
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video_row += y;
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video_putc(ch);
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}
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/* put char with attribute at xy */
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void video_putc_axy(char ch, char attr, int x, int y)
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{
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unsigned char saved_attr = video_set_attr(attr);
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video_col = x;
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video_row = y;
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video_putc(ch);
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video_set_attr(saved_attr);
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}
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void video_puts(const char *s)
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{
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while(*s) {
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video_putc(*s);
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s++;
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}
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}
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void video_puts_a(const char *s, char attr)
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{
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unsigned char saved_attr = video_set_attr(attr);
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video_puts(s);
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video_set_attr(saved_attr);
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}
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void video_puts_xy(const char *s, int x, int y)
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{
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video_cursor(x,y);
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video_puts(s);
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}
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void video_puts_axy(const char *s, char attr, int x, int y)
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{
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unsigned char saved_attr = video_set_attr(attr);
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video_puts_xy(s, x, y);
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video_set_attr(saved_attr);
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}
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void video_wipe_ca_area(unsigned char ch, char attr, int x, int y, int w, int h)
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{
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int r, c;
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/* better to do this as word writes */
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unsigned short * addr16 = (unsigned short *)video_fb + (y * 80 + x);
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unsigned short charattr = (unsigned short)ch << 8 | attr;
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charattr=vga_swap_short(charattr);
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for (r = 0 ; r < h ; r++, addr16 += 80) {
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for (c = 0 ; c < w ; c++) {
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addr16[c] = charattr;
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}
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}
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}
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void video_wipe_a_area(unsigned char attr, int x, int y, int w, int h)
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{
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int r, c;
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/* better to do this as word writes */
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unsigned short * addr16 = (unsigned short *)video_fb + (y * 80 + x);
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for (r = 0 ; r < h ; r++, addr16 += 80) {
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for (c = 0 ; c < w ; c++) {
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((char*)addr16)[c*2+1] = attr;
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}
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}
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}
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void video_wipe_c_area(unsigned char ch, int x, int y, int w, int h)
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{
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int r, c;
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/* better to do this as word writes */
|
|
unsigned short * addr16 = (unsigned short *)video_fb + (y * 80 + x);
|
|
for (r = 0 ; r < h ; r++, addr16 += 80) {
|
|
for (c = 0 ; c < w ; c++) {
|
|
((char*)addr16)[c*2] = ch;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
tl t tr
|
|
l l
|
|
bl b br
|
|
*/
|
|
typedef struct {
|
|
unsigned char tl; /* top left corner */
|
|
unsigned char t; /* top edge */
|
|
unsigned char tr; /* top right corner */
|
|
unsigned char l; /* left edge */
|
|
unsigned char r; /* right edge */
|
|
unsigned char bl; /* bottom left corner */
|
|
unsigned char b; /* bottom edge */
|
|
unsigned char br; /* bottom right corner */
|
|
} box_chars_t;
|
|
|
|
box_chars_t sbox_chars = {
|
|
0xDA, 0xC4, 0xBF,
|
|
0xB3, 0xB3,
|
|
0xC0, 0xC4, 0xD9
|
|
};
|
|
|
|
box_chars_t dbox_chars = {
|
|
0xC9, 0xCD, 0xBB,
|
|
0xBA, 0xBA,
|
|
0xC8, 0xCD, 0xBC
|
|
};
|
|
|
|
static char cmap[] = "0123456789ABCDEF";
|
|
void video_putchex(char c)
|
|
{
|
|
video_putc(cmap[(c >> 4 ) & 0xF]);
|
|
video_putc(cmap[c & 0xF]);
|
|
}
|
|
|
|
void video_putchexl(char c)
|
|
{
|
|
video_putc(cmap[c & 0xF]);
|
|
}
|
|
|
|
void video_putchexh(char c)
|
|
{
|
|
video_putc(cmap[(c >> 4) & 0xF]);
|
|
}
|
|
|
|
#define VGA_CELL_CA(a,c) (((unsigned short)c<<8)|a) /* for BIG endians */
|
|
|
|
void video_gbox_area(box_chars_t *box_chars_p, int x, int y, int w, int h)
|
|
{
|
|
int r, c;
|
|
/* better to do this as word writes */
|
|
unsigned short* addr16 = (unsigned short *)video_fb + (y * VGA_MAXCOLS + x);
|
|
for (r = 0 ; r < h ; r++, addr16 += VGA_MAXCOLS) {
|
|
if (r == 0) {
|
|
addr16[0] = VGA_CELL_CA(video_attr, box_chars_p->tl);
|
|
addr16[w-1] = VGA_CELL_CA(video_attr, box_chars_p->tr);
|
|
for (c = 1 ; c < w - 1 ; c++)
|
|
addr16[c] = VGA_CELL_CA(video_attr, box_chars_p->t);
|
|
} else if (r == h - 1) {
|
|
addr16[0] = VGA_CELL_CA(video_attr, box_chars_p->bl);
|
|
addr16[w-1] = VGA_CELL_CA(video_attr, box_chars_p->br);
|
|
for (c = 1 ; c < w - 1 ; c++)
|
|
addr16[c] = VGA_CELL_CA(video_attr, box_chars_p->b);
|
|
} else {
|
|
addr16[0] = VGA_CELL_CA(video_attr, box_chars_p->l);
|
|
addr16[w-1] = VGA_CELL_CA(video_attr, box_chars_p->r);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Writes a box on the screen */
|
|
void video_box_area(int x, int y, int w, int h) {
|
|
video_gbox_area(&sbox_chars, x, y, w, h);
|
|
}
|
|
/*writes a box with double lines on the screen */
|
|
void video_dbox_area(int x, int y, int w, int h) {
|
|
video_gbox_area(&dbox_chars, x, y, w, h);
|
|
}
|
|
|
|
/* routines to set the VGA registers */
|
|
|
|
/* set attributes */
|
|
void vga_set_attrib(void)
|
|
{
|
|
int i;
|
|
unsigned char status;
|
|
|
|
status=in8(STATUS_REG1);
|
|
i=0;
|
|
|
|
while(attr[i].reg!=0xFF) {
|
|
out8(ATTRI_INDEX,attr[i].reg);
|
|
out8(ATTRI_INDEX,attr[i].val); /* Attribute uses index for index and data */
|
|
i++;
|
|
}
|
|
out8(ATTRI_INDEX,0x20); /* unblank the screen */
|
|
}
|
|
|
|
/* set CRT Controller Registers */
|
|
void vga_set_crt(void)
|
|
{
|
|
int i;
|
|
i=0;
|
|
while(crtc[i].reg!=0xFF) {
|
|
out8(CRT_INDEX,crtc[i].reg);
|
|
out8(CRT_DATA,crtc[i].val);
|
|
i++;
|
|
}
|
|
}
|
|
/* Set Palette Registers (DAC) */
|
|
void vga_set_dac(void)
|
|
{
|
|
int i;
|
|
for(i=0;i<256;i++) {
|
|
out8(COL_PAL_IND_W,(unsigned char)i);
|
|
out8(COL_PAL_DATA,dac[i][0]); /* red */
|
|
out8(COL_PAL_DATA,dac[i][1]); /* green */
|
|
out8(COL_PAL_DATA,dac[i][2]); /* blue */
|
|
}
|
|
out8(COL_PAL_MASK,0xff); /* set mask */
|
|
}
|
|
/* set Graphic Controller Register */
|
|
void vga_set_gr(void)
|
|
{
|
|
int i;
|
|
i=0;
|
|
while(grmr[i].reg!=0xFF) {
|
|
out8(GR_INDEX,grmr[i].reg);
|
|
out8(GR_DATA,grmr[i].val);
|
|
i++;
|
|
}
|
|
}
|
|
|
|
/* Set Sequencer Registers */
|
|
void vga_set_seq(void)
|
|
{
|
|
int i;
|
|
i=0;
|
|
while(seq[i].reg!=0xFF) {
|
|
out8(SEQ_INDEX,seq[i].reg);
|
|
out8(SEQ_DATA,seq[i].val);
|
|
i++;
|
|
}
|
|
}
|
|
|
|
|
|
/* Set Extension Registers */
|
|
void vga_set_xreg(void)
|
|
{
|
|
int i;
|
|
i=0;
|
|
while(xreg[i].reg!=0xFF) {
|
|
out8(XREG_INDEX,xreg[i].reg);
|
|
out8(XREG_DATA,xreg[i].val);
|
|
i++;
|
|
}
|
|
}
|
|
|
|
/************************************************************
|
|
* some helping routines
|
|
*/
|
|
|
|
void vga_write_sr(unsigned char reg,unsigned char val)
|
|
{
|
|
out8(SEQ_INDEX,reg);
|
|
out8(SEQ_DATA,val);
|
|
}
|
|
|
|
|
|
void vga_write_gr(unsigned char reg,unsigned char val)
|
|
{
|
|
out8(GR_INDEX,reg);
|
|
out8(GR_DATA,val);
|
|
}
|
|
|
|
void vga_write_cr(unsigned char reg,unsigned char val)
|
|
{
|
|
out8(CRT_INDEX,reg);
|
|
out8(CRT_DATA,val);
|
|
}
|
|
|
|
|
|
#if 0
|
|
void video_dump_reg(void)
|
|
{
|
|
/* first dump attributes */
|
|
int i;
|
|
unsigned char status;
|
|
|
|
|
|
printf("Extended Regs:\n");
|
|
i=0;
|
|
while(xreg[i].reg!=0xFF) {
|
|
out8(XREG_INDEX,xreg[i].reg);
|
|
status=in8(XREG_DATA);
|
|
printf("XR%02X is %02X, should be %02X\n",xreg[i].reg,status,xreg[i].val);
|
|
i++;
|
|
}
|
|
printf("Sequencer Regs:\n");
|
|
i=0;
|
|
while(seq[i].reg!=0xFF) {
|
|
out8(SEQ_INDEX,seq[i].reg);
|
|
status=in8(SEQ_DATA);
|
|
printf("SR%02X is %02X, should be %02X\n",seq[i].reg,status,seq[i].val);
|
|
i++;
|
|
}
|
|
printf("Graphic Regs:\n");
|
|
i=0;
|
|
while(grmr[i].reg!=0xFF) {
|
|
out8(GR_INDEX,grmr[i].reg);
|
|
status=in8(GR_DATA);
|
|
printf("GR%02X is %02X, should be %02X\n",grmr[i].reg,status,grmr[i].val);
|
|
i++;
|
|
}
|
|
printf("CRT Regs:\n");
|
|
i=0;
|
|
while(crtc[i].reg!=0xFF) {
|
|
out8(CRT_INDEX,crtc[i].reg);
|
|
status=in8(CRT_DATA);
|
|
printf("CR%02X is %02X, should be %02X\n",crtc[i].reg,status,crtc[i].val);
|
|
i++;
|
|
}
|
|
printf("Attributes:\n");
|
|
status=in8(STATUS_REG1);
|
|
i=0;
|
|
while(attr[i].reg!=0xFF) {
|
|
out8(ATTRI_INDEX,attr[i].reg);
|
|
status=in8(ATTRI_DATA);
|
|
out8(ATTRI_INDEX,attr[i].val); /* Attribute uses index for index and data */
|
|
printf("AR%02X is %02X, should be %02X\n",attr[i].reg,status,attr[i].val);
|
|
i++;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
#endif /* CONFIG_VIDEO */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|