198 lines
5.8 KiB
C
198 lines
5.8 KiB
C
/*
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* (C) Copyright 2002
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* SPI Read/Write Utilities
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*/
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#include <common.h>
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#include <command.h>
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#if (CONFIG_COMMANDS & CFG_CMD_ETHREG)
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/*-----------------------------------------------------------------------
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* Definitions
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*/
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#ifdef CFG_ATHRS26_PHY
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extern unsigned int s26_rd_phy(unsigned int phy_addr, unsigned int reg_addr);
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extern void s26_wr_phy(unsigned int phy_addr, unsigned int reg_addr, unsigned int write_data);
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extern uint32_t athrs26_reg_read(uint32_t reg_addr);
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extern void athrs26_reg_write(uint32_t reg_addr, uint32_t reg_val);
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#endif
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#ifdef CFG_ATHRS27_PHY
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extern unsigned int s27_rd_phy(unsigned int phy_addr, unsigned int reg_addr);
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extern void s27_wr_phy(unsigned int phy_addr, unsigned int reg_addr, unsigned int write_data);
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extern uint32_t athrs27_reg_read(uint32_t reg_addr);
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extern void athrs27_reg_write(uint32_t reg_addr, uint32_t reg_val);
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#endif
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#ifdef CONFIG_AR7242_S16_PHY
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extern uint32_t athrs16_reg_read(uint32_t reg_addr);
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extern void athrs16_reg_write(uint32_t reg_addr, uint32_t reg_val);
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extern int ag7240_miiphy_read(char *devname, uint32_t phaddr,
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uint8_t reg);
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extern int ag7240_miiphy_write(char *devname, uint32_t phaddr,
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uint8_t reg, uint16_t data);
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#endif
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#define READ_MAC 0x01
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#define WRITE_MAC 0x02
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#define READ_PHY 0x10
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#define WRITE_PHY 0x20
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/*
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* Values from last command.
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*/
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static int reg;
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static int val,rd_value;
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static int phyaddr;
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static int portnum;
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int do_ethreg (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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int rcode = 0;
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/*
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* We use the last specified parameters, unless new ones are
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* entered.
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*/
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if ((flag & CMD_FLAG_REPEAT) == 0)
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{
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if (argc == 2) {
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reg = simple_strtoul(argv[1], NULL, 10);
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rcode = READ_MAC;
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}
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if (argc == 3) {
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reg = simple_strtoul(argv[1], NULL, 10);
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val = simple_strtoul(argv[2],NULL,10);
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rcode = WRITE_MAC;
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}
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if (argc == 4) {
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if(*argv[1] == 'p') {
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portnum = simple_strtoul(argv[2], NULL, 10);
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reg = simple_strtoul(argv[3],NULL,10);
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rcode = READ_PHY;
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}
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else
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return 1;
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}
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if (argc == 5) {
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if(*argv[1] == 'p') {
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portnum = simple_strtoul(argv[2], NULL, 10);
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reg = simple_strtoul(argv[3],NULL,10);
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val = simple_strtoul(argv[4],NULL,10);
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rcode = WRITE_PHY;
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}
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else
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return 1;
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}
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if ((argc > 4) && (argc < 2))
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return 1;
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}
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#ifdef CONFIG_AR7242_S16_PHY
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if(rcode == READ_PHY) {
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rd_value = ag7240_miiphy_read("eth0",portnum,reg);
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printf("Read Reg: 0x%08x = 0x%08x\n",reg,rd_value);
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}
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else if(rcode == READ_MAC) {
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rd_value = athrs16_reg_read(reg);
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printf("Read Reg: 0x%08x = 0x%08x\n",reg,rd_value);
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}
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else if(rcode == WRITE_PHY) {
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rd_value = ag7240_miiphy_read("eth0",portnum,reg);
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ag7240_miiphy_write("eth0",portnum,reg,val);
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printf("Write Reg: 0x%08x: Oldval = 0x%08x Newval = 0x%08x\n", reg, rd_value, val);
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}
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else if(rcode == WRITE_MAC) {
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rd_value = athrs16_reg_read(reg);
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athrs16_reg_write(reg,val);
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printf("Write Reg: 0x%08x: Oldval = 0x%08x Newval = 0x%08x\n", reg, rd_value, val);
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}
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else
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return 1;
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#endif
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#ifdef CFG_ATHRS26_PHY
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if(rcode == READ_PHY) {
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rd_value = s26_rd_phy(portnum,reg);
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printf("Read Reg: 0x%08x = 0x%08x\n",reg,rd_value);
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}
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else if(rcode == READ_MAC) {
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rd_value = athrs26_reg_read(reg);
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printf("Read Reg: 0x%08x = 0x%08x\n",reg,rd_value);
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}
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else if(rcode == WRITE_PHY) {
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rd_value = s26_rd_phy(portnum,reg);
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s26_wr_phy(portnum,reg,val);
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printf("Write Reg: 0x%08x: Oldval = 0x%08x Newval = 0x%08x\n", reg, rd_value, val);
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}
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else if(rcode == WRITE_MAC) {
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rd_value = athrs26_reg_read(reg);
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athrs26_reg_write(reg,val);
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printf("Write Reg: 0x%08x: Oldval = 0x%08x Newval = 0x%08x\n", reg, rd_value, val);
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}
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else
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return 1;
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#endif
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#ifdef CFG_ATHRS27_PHY
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if(rcode == READ_PHY) {
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rd_value = s27_rd_phy(portnum,reg);
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printf("Read Reg: 0x%08x = 0x%08x\n",reg,rd_value);
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}
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else if(rcode == READ_MAC) {
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rd_value = athrs27_reg_read(reg);
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printf("Read Reg: 0x%08x = 0x%08x\n",reg,rd_value);
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}
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else if(rcode == WRITE_PHY) {
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rd_value = s27_rd_phy(portnum,reg);
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s27_wr_phy(portnum,reg,val);
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printf("Write Reg: 0x%08x: Oldval = 0x%08x Newval = 0x%08x\n", reg, rd_value, val);
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}
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else if(rcode == WRITE_MAC) {
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rd_value = athrs27_reg_read(reg);
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athrs27_reg_write(reg,val);
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printf("Write Reg: 0x%08x: Oldval = 0x%08x Newval = 0x%08x\n", reg, rd_value, val);
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}
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else
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return 1;
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#endif
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return 0;
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}
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/***************************************************/
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U_BOOT_CMD(
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ethreg, 6, 1, do_ethreg,
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"ethreg - S26 PHY Reg rd/wr utility\n",
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"<p> <phyaddr> <reg> <value> - Send <bit_len> bits from <dout> out the SPI\n"
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"<p> - operates on the phy; by default is rd/wr s26 mac registers\n"
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"<phyaddr> - Address of the phy\n"
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"<reg> - Register offset\n"
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"<value> - value to write\n"
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);
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#endif /* CFG_CMD_SPI */
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