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Fabio Estevam edf0093732 mx6: ddr: Allow changing REFSEL and REFR fields 
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
 		2016-09-06 18:22:48 +02:00
..
Kconfig mx6: remove SYS_SOC from board Kconfig 2015-09-13 10:37:29 +02:00
MAINTAINERS imx6: add Bachmann OT1200 board 2014-10-06 17:24:28 +02:00
Makefile ot1200: add basic SPL support 2015-01-22 11:03:19 +01:00
README imx6: add Bachmann OT1200 board 2014-10-06 17:24:28 +02:00
mx6q_4x_mt41j128.cfg ot1200: move ccgr and gpr init to c functions 2015-01-22 11:03:19 +01:00
ot1200.c ot1200: Fix the error handling in board_eth_init() 2015-09-13 11:05:31 +02:00
ot1200_spl.c mx6: ddr: Allow changing REFSEL and REFR fields 2016-09-06 18:22:48 +02:00

README 

U-Boot for the Bachmann electronic GmbH OT1200 devices

There are two different versions of the base board, which differ
in the way ethernet is done. The variant detection is done during
runtime based on the address of the found phy.

- "mr" variant
FEC is connected directly to an ethernet switch (KSZ8895). The ethernet
port is always up and auto-negotiation is not possible.

- normal variant
FEC is connected to a normal phy and auto-negotiation is possible.


The variant name is part of the dtb file name loaded by u-boot. This
make is possible to boot the linux kernel and make use variant specific
devicetree (fixed-phy link).

In order to support different display resoltuions/sizes the OT1200 devices
are making use of EDID data stored in an i2c EEPROM.