Before clock driver availability it was required to enable usart1 clock
for serial init but now with clock driver is taking care of usart1 clock.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
add basic clock driver support for stm32f7 to enable clocks required by
the peripherals.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds device tree support for stm32f7 serial driver & removes serial
platform data structure.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Move to DM clk driver
- Add clk support for zynq_sdhci
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Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.05
- Move to DM clk driver
- Add clk support for zynq_sdhci
This device tree has been extracted from v4.9 kernel
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add SDHCI host controller found on STMicroelectronics SoCs
On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.
This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.
W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the reserved RAM is tracked by gd->arch.resv_ram, calculation
of MC memory blocks can be simplified. The MC RAM is guaranteed to be
aligned by the reservation process.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three banks. This patch
reverts commit aabd7ddb and simplifies the calculation of reserved
memory, and moves the code into common SoC file. Secure memory is
carved out first. DDR bank size is reduced. Reserved memory is then
allocated on the top of available memory. U-Boot still has access
to reserved memory as data transferring is needed. Device tree is
fixed with reduced memory size to hide the reserved memory from OS.
The same region is reserved for efi_loader.
Signed-off-by: York Sun <york.sun@nxp.com>
The execution flow is currently like this for aldo_num == 1 or 2:
int axp_set_aldo(int aldo_num, unsigned int mvolt)
{
...
if (mvolt == 0)
return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
...
return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
}
I.e. aldo1 and aldo2 will always be disabled. This patch fixes it by
setting (rather than clearing) the enable bit when mvolt != 0.
Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Fixes: 795857df41 ("sunxi: power: add AXP809 support")
"unsigned long" is a lousy data type when it comes to match peripheral
hardware registers with a fixed size.
Just do the obvious and match a 32-bit display format with an "u32"
data type for casting.
This fixes the logo display on 64-bit architectures, which produced
a black line on the right side of the logo with non-black backgrounds.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When the zynq_gem driver initializes the phy it sets the supported
features that the phy can support and advertise. However instead of
masking the supported features such that it limits the available
features it sets the phy to have the exact supported features of the
zynq_gem. This is problematic as it will enable features that a phy does
not have or cannot advertise.
Specifically this appears as an issue when using a phy that is only
capable of 10/100, but the zynq_gem driver will override this and try to
enable and advertise 10/100/1000.
Reported-by: Arno Steffens <star@gmx.li>
Fixes: 80243528ef ("net: gem: Fix gem driver on 1Gbps LAN")
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Tested-by: Arno Steffens <star@gmx.li>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
For the boards such as smartweb on which the clock driver isn't
supported, the ethernet fail to be found when booting up with
the below log.
---8<---
Net: No ethernet found.
--->8---
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
With this patch, USB Command Verifier is happy with our DFU
implementation on Chapter 9 tests.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
instead of only copying if strlen(s) is less than 32 characters, let's
just copy at most 31 characters regardless of the size of
serial#. This will guarantee that we always have a serial number if
serial# environment variable is set to anything.
Note that without a proper serial number, USB Command Verifier fails
our test of Device Descriptor since we will claim to have a serial
number without really providing one when requested.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
If last packet is short, we shouldn't write req->length bytes to
non-volatile media, we should write only what's available to us, which
is held in req->actual.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
harmonize result with other handle_XXX() functions: return int for size
remove the define RET_STAT_LEN : no more necessary
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
return the correct size for DFU_GETSTATE result (1 byte in DFU 1.1 spec)
to avoid issue in USB protocol and the variable "value" is propagated
to req->lenght as all the in the other request with answer
- DFU_GETSTATUS
- DFU_DNLOAD
- DFU_UPLOAD
Then the buffer is correctly treated in USB driver
NB: it was the only request witch directly change "req->actual"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
The "DFU descriptor set" must contain the "DFU functional descriptor"
but it is missing today in U-Boot code
(cf: DFU spec 1.1, chapter 4.2 DFU Mode Descriptor Set)
This patch only allocate buffer and copy DFU functional descriptor
after interfaces.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Remove sys_proto.h inclusion which is not used by the driver.
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Support the following DT properties:
"bias-disable"
"bias-pull-up"
"bias-pull-down"
"bias-pull-pin-default"
"input-enable"
"input-disable"
My main motivation is to support pull up/down biasing. For Pro5 and
later SoCs, the pupdctrl register number is the same as the pinmux
number, so this feature can be supported without having big pin
tables.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently the system hangs when the 'videomode' variable is not present
and a reset command is issued:
=> setenv videomode
=> saveenv
=> reset
(Board hangs)
lcdif_power_down() assumes that the LCDIF controller has been properly
configured and enabled, which may not be true.
To fix this issue check whether panel.frameAdrs has been initialized and
in case it has not been initialized, do not continue with the LCDIF
powerdown sequence.
Tested on a imx7dsabresd board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
The i.MX7 has the same GPMI controller as i.MX6 and is covered by the MXS
driver. Tell Kconfig that we can use this driver on the MX7 platform (the MXS
driver already has the few i.MX7-specific changes needed for basic operation
and the board itself sets the pinmux correctly).
Tested on i.MX7D with the Sabre board and a NAND Flash soldered to U12.
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
With gcc-6.x we see:
drivers/i2c/fsl_i2c.c:86:3: warning: ‘fsl_i2c_speed_map’ defined but not
used [-Wunused-const-variable=]
The easy way to fix this is that since we only use fsl_i2c_speed_map at
all on __M68K__ move the existing guards around slightly.
Reported-by: Thomas Schaefer <Thomas.Schaefer@kontron.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
The maximum supported peripheral clock frequency of the zynq depends on
the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz
respectively 25 MHz. Use the max-frequency value of the device tree to
determine the maximal supported peripheral clock frequency.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
clock frequency but this clock is not fixed and depends on the hardware
configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ
doesn't match the real base clock frequency of SDIO_FREQ. Use the clock
framework to determine the frequency at run time.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for the optional ethernet emio clock source to the zynq
clock framework driver.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move the zynq to clock framework and remove unused functions as well as
the CONFIG_ZYNQ_PS_CLK_FREQ configuration.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add a clock framework driver for the zynq platform. The driver is based
on the platform zynq clock driver but reworked to use static functions
instead of run-time generated objects even for unused clocks.
Additionally the CONFIG_ZYNQ_PS_CLK_FREQ is replaced by the
ps-clk-frequency from the device tree.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
If available use the clock framework to set the tx clock rate of the
zynq ethernet controller.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The gem[0-1]_rclk_ctrl registers control the source of the rx clock,
control and data signals and configure via ps7_init function. Don't
overwrite the register with the default value.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
With the Kconfig re-sync with Linux 4.10, characters such as
'}', ';' in Kconfig help message cause warnings:
$ make defconfig
*** Default configuration is based on 'sandbox_defconfig'
drivers/i2c/Kconfig:132:warning: ignoring unsupported character '}'
drivers/i2c/Kconfig:132:warning: ignoring unsupported character ';'
Drop the Device Tree fragment from the help.
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
not completed. Finish this work by the tool.
During this move, let's rename it to CONFIG_MTD_NOR_FLASH.
Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH"
than those of "#ifdef CONFIG_SYS_NO_FLASH". Flipping the logic will
make the code more readable. Besides, negative meaning symbols do
not fit in obj-$(CONFIG_...) style Makefiles.
This commit was created as follows:
[1] Edit "default n" to "default y" in the config entry in
common/Kconfig.
[2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH"
[3] Rename the instances in defconfigs by the following:
find . -path './configs/*_defconfig' | xargs sed -i \
-e '/CONFIG_SYS_NO_FLASH=y/d' \
-e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/'
[4] Change the conditionals by the following:
find . -name '*.[ch]' | xargs sed -i \
-e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \
-e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \
-e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \
-e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/'
[5] Modify the following manually
- Rename the rest of instances
- Remove the description from README
- Create the new Kconfig entry in drivers/mtd/Kconfig
- Remove the old Kconfig entry from common/Kconfig
- Remove the garbage comments from include/configs/*.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
It was incorrect to always include "asm/arch-omap3/mux.h" constantly.
This introduced warnings on non-omap3 where certain values will conflict
between the various families. Conditionally guard the inclusion in
order to correct the problem.
Fixes: 6aca17c9b7 ("drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx")
Signed-off-by: Tom Rini <trini@konsulko.com>
MMC devices accessed exclusively via the driver model were not
being initialized before being exposed as block devices, causing
issues in scenarios where the MMC device is first accessed via the
uclass block interface.
Signed-off-by: Fiach Antaw <fiach.antaw@uqconnect.edu.au>
On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has
a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which
are related to GPIO_126, 127 and 129 are disabled. Some boards may
need this for MMC. After the PBIAS is configured, this bit should
be set high to enable these GPIO pins.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
ftsdc021_sdhci.c is dead file.
There is no reason to maintain this host controller.
Removes the entire ftsdc021_sdhci.c.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
If there are alias nodes as "mmc", use the devnum as alias index
number.
This patch is for fixing a problem of Exynos4 series.
Problem is the below thing.
Current legacy mode:
EXYNOS DWMMC: 0, SAMSUNG SDHCI: 1
After using DM:
SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1
Dev index is swapped.
Then u-boot can't find the kernel image..because it is already set to 0 as mmcdev.
If change from legacy to DM, also needs to touch all exynos4 config file.
For using simply, just supporting the fixed devnum with alias node is better than it.
Usage:
alaise {
....
mmc0 = &sdhci2; /* eMMC */
mmc1 = &sdhci1; /* SD */
...
}
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vikas Manocha
Tom Rini
Patrice Chotard
York Sun
Rask Ingemann Lambertsen
Andre Przywara
Nathan Rossi
Wenyou Yang
Nickey Yang Nickey Yang
Felipe Balbi
Patrick Delaunay
Vincent Tinelli
Masahiro Yamada
Fabio Estevam
Andrey Yurovsky
Stefan Herbrechtsmeier
Fiach Antaw
Adam Ford
Jaehoon Chung