diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index 1c5b95304b..0be7845cc3 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -54,19 +54,19 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_DSE_80ohm | PAD_CTL_HYS | \ PAD_CTL_ODE | PAD_CTL_SRE_FAST) -#if defined(CONFIG_MX6Q) +#if defined(CONFIG_TQMA6Q) #define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII 0x02e0790 #define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM 0x02e07ac -#elif defined(CONFIG_MX6S) +#elif defined(CONFIG_TQMA6S) #define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII 0x02e0768 #define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM 0x02e0788 #else -#error "need to define target CPU" +#error "need to select module" #endif @@ -243,14 +243,15 @@ int board_phy_config(struct phy_device *phydev) { /* * optimized pad skew values depends on CPU variant on the TQMa6x module: - * i.MX6Q/D or i.MX6DL/S + * CONFIG_TQMA6Q: i.MX6Q/D + * CONFIG_TQMA6S: i.MX6S */ -#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q) +#if defined(CONFIG_TQMA6Q) #define MBA6X_KSZ9031_CTRL_SKEW 0x0032 #define MBA6X_KSZ9031_CLK_SKEW 0x03ff #define MBA6X_KSZ9031_RX_SKEW 0x3333 #define MBA6X_KSZ9031_TX_SKEW 0x2036 -#elif defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#elif defined(CONFIG_TQMA6S) #define MBA6X_KSZ9031_CTRL_SKEW 0x0030 #define MBA6X_KSZ9031_CLK_SKEW 0x03ff #define MBA6X_KSZ9031_RX_SKEW 0x3333 diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 1c0a762d69..2a63686f5d 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -18,17 +18,17 @@ /* #endif */ /* place code in last 4 MiB of RAM */ -#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#if defined(CONFIG_TQMA6S) #define CONFIG_SYS_TEXT_BASE 0x2fc00000 -#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#elif defined(CONFIG_TQMA6Q) #define CONFIG_SYS_TEXT_BASE 0x4fc00000 #endif #include "mx6_common.h" -#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#if defined(CONFIG_TQMA6S) #define PHYS_SDRAM_SIZE (512u * SZ_1M) -#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#elif defined(CONFIG_TQMA6Q) #define PHYS_SDRAM_SIZE (1024u * SZ_1M) #endif