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ARM: AM43xx: EMIF: configure self-refresh entry delay 

Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl
and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the
desired delay in cycles that the EMIF waits without an access to enter
self-refresh, in this case 8192 cycles. With this, code desiring to
enter self refresh only has to toggle one bit to enable it.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
This commit is contained in:
Dave Gerlach 2014-01-30 22:24:24 -06:00 committed by Tom Rini
parent a9863aa25f
commit cee2fd5496
1 changed files with 2 additions and 2 deletions
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4
arch/arm/cpu/armv7/am33xx/emif4d5.c
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@ -160,8 +160,8 @@ void do_sdram_init(const struct ctrl_ioregs *ioregs,
writel(regs->sdram_tim3, &emif->emif_sdram_tim_3);
writel(regs->sdram_tim3, &emif->emif_sdram_tim_3_shdw);
writel(0x0, &emif->emif_pwr_mgmt_ctrl);
writel(0x0, &emif->emif_pwr_mgmt_ctrl_shdw);
writel(0xA0, &emif->emif_pwr_mgmt_ctrl);
writel(0xA0, &emif->emif_pwr_mgmt_ctrl_shdw);
writel(0x1, &emif->emif_iodft_tlgc);
writel(regs->zq_config, &emif->emif_zq_config);