From c0efc3140e75e3ffd6127a5aec97b75347ec7417 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Sat, 28 Jan 2017 06:53:53 +0900 Subject: [PATCH] ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB The Boot ROM supports authentication feature to prevent malformed software from being run on products. The signature is added at the tail of the second stage loader (= SPL in U-boot terminology). The size of the second stage loader was 64KB, and it was consistent across SoCs. The situation changed when LD20 SoC appeared; it loads 80KB second stage loader, and it is the only exception. Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is loaded from the 64KB offset of non-volatile devices. This means the signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot proper image. Let's move the U-Boot proper image to 128KB offset. It uses 48KB for nothing but padding, and we could actually locate the U-Boot proper at 80KB offset. However, the power of 2 generally seems a better choice for the offset address. Signed-off-by: Masahiro Yamada --- common/spl/Kconfig | 3 +-- include/configs/uniphier.h | 20 +++++++++++++------- 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index b1aa1483c9..b2ba492abd 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -86,9 +86,8 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR depends on SPL && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR default 0x50 if ARCH_SUNXI default 0x75 if ARCH_DAVINCI - default 0x80 if ARCH_UNIPHIER default 0x8a if ARCH_MX6 - default 0x100 if ARCH_ROCKCHIP + default 0x100 if ARCH_ROCKCHIP || ARCH_UNIPHIER default 0x140 if ARCH_MVEBU default 0x200 if ARCH_SOCFPGA || ARCH_AT91 default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 817bf45f8f..49309c967b 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -230,19 +230,19 @@ "nor_base=0x42000000\0" \ "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ "tftpboot $tmp_addr u-boot-spl.bin &&" \ - "setexpr tmp_addr $nor_base + 0x60000 &&" \ + "setexpr tmp_addr $nor_base + 0x70000 && " \ "tftpboot $tmp_addr u-boot.bin\0" \ "emmcupdate=mmcsetn &&" \ "mmc partconf $mmc_first_dev 0 1 1 &&" \ "tftpboot u-boot-spl.bin &&" \ - "mmc write $loadaddr 0 80 &&" \ + "mmc write $loadaddr 0 100 && " \ "tftpboot u-boot.bin &&" \ - "mmc write $loadaddr 80 780\0" \ + "mmc write $loadaddr 100 700\0" \ "nandupdate=nand erase 0 0x00100000 &&" \ "tftpboot u-boot-spl.bin &&" \ - "nand write $loadaddr 0 0x00010000 &&" \ + "nand write $loadaddr 0 0x00020000 && " \ "tftpboot u-boot.bin &&" \ - "nand write $loadaddr 0x00010000 0x000f0000\0" \ + "nand write $loadaddr 0x00020000 0x000e0000\0" \ LINUXBOOT_ENV_SETTINGS #define CONFIG_SYS_BOOTMAPSZ 0x20000000 @@ -282,14 +282,18 @@ #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 /* subtract sizeof(struct image_header) */ -#define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40) +#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 +#if defined(CONFIG_ARCH_UNIPHIER_LD20) +#define CONFIG_SPL_MAX_SIZE 0x14000 +#else #define CONFIG_SPL_MAX_SIZE 0x10000 +#endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) #define CONFIG_SPL_BSS_START_ADDR 0x30012000 #elif defined(CONFIG_ARCH_UNIPHIER_LD20) @@ -297,4 +301,6 @@ #endif #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 +#define CONFIG_SPL_PAD_TO 0x20000 + #endif /* __CONFIG_UNIPHIER_COMMON_H__ */