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sysmobts: Increase FPGA turn-a-round time to help NAND 

For the Toshiba NAND chip if both NAND (read) and FPGA CS the
time to switch might not be enough. Wait longer as discussed
by email.
This commit is contained in:
Holger Hans Peter Freyther 2016-06-28 08:55:55 +02:00
parent 32c1294d62
commit b76546b5b8
1 changed files with 1 additions and 1 deletions
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2
board/davinci/sysmobts_v2/sysmobts_v2.c
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@ -40,7 +40,7 @@
#define DAVINCI_AWCCR_VAL (0x000000FF) /* EMIF-A async wait cycle config register value. */
#define DAVINCI_A2CR (0x01E00014) /* EMIF-A CS3 config register. */
#define DAVINCI_A2CR_VAL (0x00430491) /* EMIF-A CS3 value for FPGA. */
#define DAVINCI_A2CR_VAL8 (0x00630591) /* EMIF-A CS3 value for FPGA. */
#define DAVINCI_A2CR_VAL8 (0x0063059D) /* EMIF-A CS3 value for FPGA. */
DECLARE_GLOBAL_DATA_PTR;