Initial revision

This commit is contained in:
wdenk 2002-11-03 01:41:26 +00:00
parent f18f47f4d4
commit afd7f3d0de
4 changed files with 3073 additions and 0 deletions

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board/bmw/early_init.S Normal file

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/*
* (C) Copyright 2000
* Marius Groeger <mgroeger@sysgo.de>
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
*
* (C) Copyright 2000, 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2001
* Advent Networks, Inc. <http://www.adventnetworks.com>
* Oliver Brown <oliverb@alumni.utexas.net>
*
*--------------------------------------------------------------------
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*********************************************************************/
/* DESCRIPTION:
* This file contains the flash routines for the GW8260 board.
*
*
*
* MODULE DEPENDENCY:
* None
*
*
* RESTRICTIONS/LIMITATIONS:
*
* Only supports the following flash devices:
* AMD 29F080B
* AMD 29F016D
*
* Copyright (c) 2001, Advent Networks, Inc.
*
*/
/*********************************************************************/
#include <common.h>
#include <mpc8260.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
static ulong flash_get_size (vu_long *addr, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
/*********************************************************************/
/* functions */
/*********************************************************************/
/*********************************************************************/
/* NAME: flash_init() - initializes flash banks */
/* */
/* DESCRIPTION: */
/* This function initializes the flash bank(s). */
/* */
/* RETURNS: */
/* The size in bytes of the flash */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
unsigned long flash_init (void)
{
unsigned long size;
int i;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* for now, only support the 4 MB Flash SIMM */
size = flash_get_size((vu_long *)CFG_FLASH0_BASE, &flash_info[0]);
/*
* protect monitor and environment sectors
*/
#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
&flash_info[0]);
#endif
#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
# ifndef CFG_ENV_SIZE
# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
# endif
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
&flash_info[0]);
#endif
return (CFG_FLASH0_SIZE * 1024 * 1024); /*size*/
}
/*********************************************************************/
/* NAME: flash_print_info() - prints flash imformation */
/* */
/* DESCRIPTION: */
/* This function prints the flash information. */
/* */
/* INPUTS: */
/* flash_info_t *info - flash information structure */
/* */
/* OUTPUTS: */
/* Displays flash information to console */
/* */
/* RETURNS: */
/* None */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
void flash_print_info (flash_info_t *info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch ((info->flash_id >> 16) & 0xff) {
case 0x1:
printf ("AMD ");
break;
default:
printf ("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case AMD_ID_F040B:
printf ("AM29F040B (4 Mbit)\n");
break;
case AMD_ID_F080B:
printf ("AM29F080B (8 Mbit)\n");
break;
case AMD_ID_F016D:
printf ("AM29F016D (16 Mbit)\n");
break;
default:
printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
}
printf ("\n");
return;
}
/*********************************************************************/
/* The following code cannot be run from FLASH! */
/*********************************************************************/
/*********************************************************************/
/* NAME: flash_get_size() - detects the flash size */
/* */
/* DESCRIPTION: */
/* 1) Reads vendor ID and devices ID from the flash devices. */
/* 2) Initializes flash info struct. */
/* 3) Return the flash size */
/* */
/* INPUTS: */
/* vu_long *addr - pointer to start of flash */
/* flash_info_t *info - flash information structure */
/* */
/* OUTPUTS: */
/* None */
/* */
/* RETURNS: */
/* Size of the flash in bytes, or 0 if device id is unknown. */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* Only supports the following devices: */
/* AM29F080D */
/* AM29F016D */
/* */
/*********************************************************************/
static ulong flash_get_size (vu_long *addr, flash_info_t *info)
{
short i;
vu_long vendor, devid;
ulong base = (ulong)addr;
/*printf("addr = %08lx\n", (unsigned long)addr); */
/* Reset and Write auto select command: read Manufacturer ID */
addr[0x0000] = 0xf0f0f0f0;
addr[0x0555] = 0xAAAAAAAA;
addr[0x02AA] = 0x55555555;
addr[0x0555] = 0x90909090;
udelay (1000);
vendor = addr[0];
/*printf("vendor = %08lx\n", vendor); */
if (vendor != 0x01010101) {
info->size = 0;
goto out;
}
devid = addr[1];
/*printf("devid = %08lx\n", devid); */
if ((devid & 0xff) == AMD_ID_F080B) {
info->flash_id = (vendor & 0xff) << 16 | AMD_ID_F080B;
/* we have 16 sectors with 64KB each x 4 */
info->sector_count = 16;
info->size = 4 * info->sector_count * 64*1024;
} else if ((devid & 0xff) == AMD_ID_F016D){
info->flash_id = (vendor & 0xff) << 16 | AMD_ID_F016D;
/* we have 32 sectors with 64KB each x 4 */
info->sector_count = 32;
info->size = 4 * info->sector_count * 64*1024;
} else {
info->size = 0;
goto out;
}
/*printf("sector count = %08x\n", info->sector_count); */
/* check for protected sectors */
for (i = 0; i < info->sector_count; i++) {
/* sector base address */
info->start[i] = base + i * (info->size / info->sector_count);
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
/* D0 = 1 if protected */
addr = (volatile unsigned long *)(info->start[i]);
info->protect[i] = addr[2] & 1;
}
/* reset command */
addr = (vu_long *)info->start[0];
out:
addr[0] = 0xf0f0f0f0;
/*printf("size = %08x\n", info->size); */
return info->size;
}
/*********************************************************************/
/* NAME: flash_erase() - erases flash by sector */
/* */
/* DESCRIPTION: */
/* This function erases flash sectors starting for s_first to */
/* s_last. */
/* */
/* INPUTS: */
/* flash_info_t *info - flash information structure */
/* int s_first - first sector to erase */
/* int s_last - last sector to erase */
/* */
/* OUTPUTS: */
/* None */
/* */
/* RETURNS: */
/* Returns 0 for success, 1 for failure. */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/*********************************************************************/
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
vu_long *addr = (vu_long*)(info->start[0]);
int flag, prot, sect, l_sect;
ulong start, now, last;
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf ("\n");
}
l_sect = -1;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0xAAAAAAAA;
addr[0x02AA] = 0x55555555;
addr[0x0555] = 0x80808080;
addr[0x0555] = 0xAAAAAAAA;
addr[0x02AA] = 0x55555555;
udelay (100);
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
addr = (vu_long*)(info->start[sect]);
addr[0] = 0x30303030;
l_sect = sect;
}
}
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
/*
* We wait for the last triggered sector
*/
if (l_sect < 0)
goto DONE;
start = get_timer (0);
last = start;
addr = (vu_long*)(info->start[l_sect]);
while ((addr[0] & 0x80808080) != 0x80808080) {
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
serial_putc ('.');
last = now;
}
}
DONE:
/* reset to read mode */
addr = (volatile unsigned long *)info->start[0];
addr[0] = 0xF0F0F0F0; /* reset bank */
printf (" done\n");
return 0;
}
/*********************************************************************/
/* NAME: write_buff() - writes a buffer to flash */
/* */
/* DESCRIPTION: */
/* This function copies a buffer, *src, to flash. */
/* */
/* INPUTS: */
/* flash_info_t *info - flash information structure */
/* uchar *src - pointer to buffer to write to flash */
/* ulong addr - address to start write at */
/* ulong cnt - number of bytes to write to flash */
/* */
/* OUTPUTS: */
/* None */
/* */
/* RETURNS: */
/* 0 - OK */
/* 1 - write timeout */
/* 2 - Flash not erased */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/*********************************************************************/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
ulong cp, wp, data;
int i, l, rc;
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
for (; (i < 4) && (cnt > 0); ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; (cnt == 0) && (i < 4); ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while (cnt >= 4) {
data = 0;
for (i = 0; i < 4; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += 4;
cnt -= 4;
}
if (cnt == 0) {
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i = 0, cp = wp; (i < 4) && (cnt > 0); ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; (i < 4); ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
return (write_word(info, wp, data));
}
/*********************************************************************/
/* NAME: write_word() - writes a word to flash */
/* */
/* DESCRIPTION: */
/* This writes a single word to flash. */
/* */
/* INPUTS: */
/* flash_info_t *info - flash information structure */
/* ulong dest - address to write */
/* ulong data - data to write */
/* */
/* OUTPUTS: */
/* None */
/* */
/* RETURNS: */
/* 0 - OK */
/* 1 - write timeout */
/* 2 - Flash not erased */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/*********************************************************************/
static int write_word (flash_info_t *info, ulong dest, ulong data)
{
vu_long *addr = (vu_long*)(info->start[0]);
ulong start;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*((vu_long *)dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0xAAAAAAAA;
addr[0x02AA] = 0x55555555;
addr[0x0555] = 0xA0A0A0A0;
*((vu_long *)dest) = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
return (0);
}
/*********************************************************************/
/* End of flash.c */
/*********************************************************************/

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/*
* (C) Copyright 2000
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2001
* Advent Networks, Inc. <http://www.adventnetworks.com>
* Jay Monkman <jtm@smoothsmoothie.com>
*
* (C) Copyright 2001
* Advent Networks, Inc. <http://www.adventnetworks.com>
* Oliver Brown <oliverb@alumni.utexas.net>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*********************************************************************/
/* DESCRIPTION:
* This file contains the board routines for the GW8260 board.
*
* MODULE DEPENDENCY:
* None
*
* RESTRICTIONS/LIMITATIONS:
* None
*
* Copyright (c) 2001, Advent Networks, Inc.
*/
/*********************************************************************/
#include <common.h>
#include <ioports.h>
#include <mpc8260.h>
/*
* I/O Port configuration table
*
*/
const iop_conf_t iop_conf_tab[4][32] = {
/* Port A configuration */
{ /* conf ppar psor pdir podr pdat */
/* PA31 */ { 1, 0, 0, 1, 0, 0 }, /* TP14 */
/* PA30 */ { 1, 1, 1, 1, 0, 0 }, /* US_RTS */
/* PA29 */ { 1, 0, 0, 1, 0, 1 }, /* LSSI_DATA */
/* PA28 */ { 1, 0, 0, 1, 0, 1 }, /* LSSI_CLK */
/* PA27 */ { 1, 0, 0, 1, 0, 0 }, /* TP12 */
/* PA26 */ { 1, 0, 0, 0, 0, 0 }, /* IO_STATUS */
/* PA25 */ { 1, 0, 0, 0, 0, 0 }, /* IO_CLOCK */
/* PA24 */ { 1, 0, 0, 0, 0, 0 }, /* IO_CONFIG */
/* PA23 */ { 1, 0, 0, 0, 0, 0 }, /* IO_DONE */
/* PA22 */ { 1, 0, 0, 0, 0, 0 }, /* IO_DATA */
/* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD3 */
/* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD2 */
/* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD1 */
/* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD0 */
/* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD0 */
/* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD1 */
/* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD2 */
/* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD3 */
/* PA13 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE7 */
/* PA12 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE6 */
/* PA11 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE5 */
/* PA10 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE4 */
/* PA9 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE3 */
/* PA8 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE2 */
/* PA7 */ { 1, 0, 0, 0, 0, 0 }, /* LSSI_IN */
/* PA6 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE0 */
/* PA5 */ { 1, 0, 0, 1, 0, 0 }, /* DEMOD_RESET_ */
/* PA4 */ { 1, 0, 0, 1, 0, 0 }, /* MOD_RESET_ */
/* PA3 */ { 1, 0, 0, 1, 0, 0 }, /* IO_RESET */
/* PA2 */ { 1, 0, 0, 1, 0, 0 }, /* TX_ENABLE */
/* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* RX_LOCK */
/* PA0 */ { 1, 0, 0, 1, 0, 1 } /* MPC_RESET_ */
},
/* Port B configuration */
{ /* conf ppar psor pdir podr pdat */
/* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TX_ER */
/* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RX_DV */
/* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FETH0_TX_EN */
/* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RX_ER */
/* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_COL */
/* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_CRS */
/* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD3 */
/* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD2 */
/* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD1 */
/* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD0 */
/* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD0 */
/* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD1 */
/* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD2 */
/* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD3 */
/* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RX_DV */
/* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RX_ER */
/* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TX_ER */
/* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TX_EN */
/* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_COL */
/* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_CRS */
/* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD3 */
/* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD2 */
/* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD1 */
/* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD0 */
/* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD0 */
/* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD1 */
/* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD2 */
/* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD3 */
/* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
/* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
/* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
/* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
},
/* Port C */
{ /* conf ppar psor pdir podr pdat */
/* PC31 */ { 1, 0, 0, 1, 0, 1 }, /* FAST_RESET_ */
/* PC30 */ { 1, 0, 0, 1, 0, 1 }, /* FAST_PAUSE_ */
/* PC29 */ { 1, 0, 0, 1, 0, 0 }, /* FAST_SLEW1 */
/* PC28 */ { 1, 0, 0, 1, 0, 0 }, /* FAST_SLEW0 */
/* PC27 */ { 1, 0, 0, 1, 0, 0 }, /* TP13 */
/* PC26 */ { 1, 0, 0, 0, 0, 0 }, /* RXDECDFLG */
/* PC25 */ { 1, 0, 0, 0, 0, 0 }, /* RXACQFAIL */
/* PC24 */ { 1, 0, 0, 0, 0, 0 }, /* RXACQFLG */
/* PC23 */ { 1, 0, 0, 1, 0, 0 }, /* WD_TCL */
/* PC22 */ { 1, 0, 0, 1, 0, 0 }, /* WD_EN */
/* PC21 */ { 1, 0, 0, 1, 0, 0 }, /* US_TXCLK */
/* PC20 */ { 1, 0, 0, 0, 0, 0 }, /* DS_RXCLK */
/* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RX_CLK */
/* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_TX_CLK */
/* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RX_CLK */
/* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_TX_CLK */
/* PC15 */ { 1, 0, 0, 1, 0, 0 }, /* TX_SHUTDOWN_ */
/* PC14 */ { 1, 0, 0, 0, 0, 0 }, /* RS_232_DTR_ */
/* PC13 */ { 1, 0, 0, 0, 0, 0 }, /* TXERR */
/* PC12 */ { 1, 0, 0, 1, 0, 1 }, /* FETH1_MDDIS */
/* PC11 */ { 1, 0, 0, 1, 0, 1 }, /* FETH0_MDDIS */
/* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* MDC */
/* PC9 */ { 1, 0, 0, 1, 1, 1 }, /* MDIO */
/* PC8 */ { 1, 0, 0, 1, 1, 1 }, /* SER_NUM */
/* PC7 */ { 1, 1, 0, 0, 0, 0 }, /* US_CTS */
/* PC6 */ { 1, 1, 0, 0, 0, 0 }, /* DS_CD_ */
/* PC5 */ { 1, 0, 0, 1, 0, 0 }, /* FETH1_PWRDWN */
/* PC4 */ { 1, 0, 0, 1, 0, 0 }, /* FETH0_PWRDWN */
/* PC3 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED3 */
/* PC2 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED2 */
/* PC1 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED1 */
/* PC0 */ { 1, 0, 0, 1, 0, 1 }, /* MPULED0 */
},
/* Port D */
{ /* conf ppar psor pdir podr pdat */
/* PD31 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD30 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD29 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD28 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD27 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD26 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD25 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD24 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD23 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD22 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD21 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD20 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD19 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
/* PD18 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
/* PD17 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
/* PD16 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
/* PD15 */ { 1, 1, 1, 0, 1, 1 }, /* SDRAM_SDA */
/* PD14 */ { 1, 1, 1, 0, 1, 1 }, /* SDRAM_SCL */
/* PD13 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED7 */
/* PD12 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED6 */
/* PD11 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED5 */
/* PD10 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED4 */
/* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* RS232_TXD */
/* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* RD232_RXD */
/* PD7 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD6 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD5 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD4 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
/* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
/* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
/* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
/* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
}
};
/*********************************************************************/
/* NAME: checkboard() - Displays the board type and serial number */
/* */
/* OUTPUTS: */
/* Displays the board type and serial number */
/* */
/* RETURNS: */
/* Always returns 1 */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
int checkboard(void)
{
char *str;
puts ("Board: Advent Networks gw8260\n");
str = getenv("serial#");
if (str != NULL) {
printf("SN: %s\n", str);
}
return 0;
}
#if defined (CFG_DRAM_TEST)
/*********************************************************************/
/* NAME: move64() - moves a double word (64-bit) */
/* */
/* DESCRIPTION: */
/* this function performs a double word move from the data at */
/* the source pointer to the location at the destination pointer. */
/* */
/* INPUTS: */
/* unsigned long long *src - pointer to data to move */
/* */
/* OUTPUTS: */
/* unsigned long long *dest - pointer to locate to move data */
/* */
/* RETURNS: */
/* None */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* May cloober fr0. */
/* */
/*********************************************************************/
static void move64(unsigned long long *src, unsigned long long *dest)
{
asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
"stfd 0, 0(4)" /* *dest = fpr0 */
: : : "fr0" ); /* Clobbers fr0 */
return;
}
#if defined (CFG_DRAM_TEST_DATA)
unsigned long long pattern[]= {
0xaaaaaaaaaaaaaaaa,
0xcccccccccccccccc,
0xf0f0f0f0f0f0f0f0,
0xff00ff00ff00ff00,
0xffff0000ffff0000,
0xffffffff00000000,
0x00000000ffffffff,
0x0000ffff0000ffff,
0x00ff00ff00ff00ff,
0x0f0f0f0f0f0f0f0f,
0x3333333333333333,
0x5555555555555555};
/*********************************************************************/
/* NAME: mem_test_data() - test data lines for shorts and opens */
/* */
/* DESCRIPTION: */
/* Tests data lines for shorts and opens by forcing adjacent data */
/* to opposite states. Because the data lines could be routed in */
/* an arbitrary manner the must ensure test patterns ensure that */
/* every case is tested. By using the following series of binary */
/* patterns every combination of adjacent bits is test regardless */
/* of routing. */
/* */
/* ...101010101010101010101010 */
/* ...110011001100110011001100 */
/* ...111100001111000011110000 */
/* ...111111110000000011111111 */
/* */
/* Carrying this out, gives us six hex patterns as follows: */
/* */
/* 0xaaaaaaaaaaaaaaaa */
/* 0xcccccccccccccccc */
/* 0xf0f0f0f0f0f0f0f0 */
/* 0xff00ff00ff00ff00 */
/* 0xffff0000ffff0000 */
/* 0xffffffff00000000 */
/* */
/* The number test patterns will always be given by: */
/* */
/* log(base 2)(number data bits) = log2 (64) = 6 */
/* */
/* To test for short and opens to other signals on our boards. we */
/* simply */
/* test with the 1's complemnt of the paterns as well. */
/* */
/* OUTPUTS: */
/* Displays failing test pattern */
/* */
/* RETURNS: */
/* 0 - Passed test */
/* 1 - Failed test */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* Assumes only one one SDRAM bank */
/* */
/*********************************************************************/
int mem_test_data(void)
{
unsigned long long * pmem =
(unsigned long long *)CFG_SDRAM_BASE ;
unsigned long long temp64;
int num_patterns = sizeof(pattern)/ sizeof(pattern[0]);
int i;
unsigned int hi, lo;
for ( i = 0; i < num_patterns; i++) {
move64(&(pattern[i]), pmem);
move64(pmem, &temp64);
/* hi = (temp64>>32) & 0xffffffff; */
/* lo = temp64 & 0xffffffff; */
/* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
hi = (pattern[i]>>32) & 0xffffffff;
lo = pattern[i] & 0xffffffff;
/* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */
if (temp64 != pattern[i]){
printf ("\n Data Test Failed, pattern 0x%08x%08x", hi, lo);
return 1;
}
}
return 0;
}
#endif /* CFG_DRAM_TEST_DATA */
#if defined (CFG_DRAM_TEST_ADDRESS)
/*********************************************************************/
/* NAME: mem_test_address() - test address lines */
/* */
/* DESCRIPTION: */
/* This function performs a test to verify that each word im */
/* memory is uniquly addressable. The test sequence is as follows: */
/* */
/* 1) write the address of each word to each word. */
/* 2) verify that each location equals its address */
/* */
/* OUTPUTS: */
/* Displays failing test pattern and address */
/* */
/* RETURNS: */
/* 0 - Passed test */
/* 1 - Failed test */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
int mem_test_address(void)
{
volatile unsigned int * pmem = (volatile unsigned int *)CFG_SDRAM_BASE ;
const unsigned int size = (CFG_SDRAM_SIZE * 1024 * 1024)/4;
unsigned int i;
/* write address to each location */
for ( i = 0; i < size; i++) {
pmem[i] = i;
}
/* verify each loaction */
for ( i = 0; i < size; i++) {
if (pmem[i] != i) {
printf("\n Address Test Failed at 0x%x", i);
return 1;
}
}
return 0;
}
#endif /* CFG_DRAM_TEST_ADDRESS */
#if defined (CFG_DRAM_TEST_WALK)
/*********************************************************************/
/* NAME: mem_march() - memory march */
/* */
/* DESCRIPTION: */
/* Marches up through memory. At each location verifies rmask if */
/* read = 1. At each location write wmask if write = 1. Displays */
/* failing address and pattern. */
/* */
/* INPUTS: */
/* volatile unsigned long long * base - start address of test */
/* unsigned int size - number of dwords(64-bit) to test */
/* unsigned long long rmask - read verify mask */
/* unsigned long long wmask - wrtie verify mask */
/* short read - verifies rmask if read = 1 */
/* short write - writes wmask if write = 1 */
/* */
/* OUTPUTS: */
/* Displays failing test pattern and address */
/* */
/* RETURNS: */
/* 0 - Passed test */
/* 1 - Failed test */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
int mem_march(volatile unsigned long long * base,
unsigned int size,
unsigned long long rmask,
unsigned long long wmask,
short read,
short write)
{
unsigned int i;
unsigned long long temp;
unsigned int hitemp, lotemp, himask, lomask;
for (i = 0 ; i < size ; i++) {
if (read != 0) {
/* temp = base[i]; */
move64 ((unsigned long long *)&(base[i]), &temp);
if (rmask != temp) {
hitemp = (temp>>32) & 0xffffffff;
lotemp = temp & 0xffffffff;
himask = (rmask>>32) & 0xffffffff;
lomask = rmask & 0xffffffff;
printf("\n Walking one's test failed: address = 0x%08x,"
"\n\texpected 0x%08x%08x, found 0x%08x%08x",
i<<3, himask, lomask, hitemp, lotemp);
return 1;
}
}
if ( write != 0 ) {
/* base[i] = wmask; */
move64 (&wmask, (unsigned long long *)&(base[i]));
}
}
return 0;
}
#endif /* CFG_DRAM_TEST_WALK */
/*********************************************************************/
/* NAME: mem_test_walk() - a simple walking ones test */
/* */
/* DESCRIPTION: */
/* Performs a walking ones through entire physical memory. The */
/* test uses as series of memory marches, mem_march(), to verify */
/* and write the test patterns to memory. The test sequence is as */
/* follows: */
/* 1) march writing 0000...0001 */
/* 2) march verifying 0000...0001 , writing 0000...0010 */
/* 3) repeat step 2 shifting masks left 1 bit each time unitl */
/* the write mask equals 1000...0000 */
/* 4) march verifying 1000...0000 */
/* The test fails if any of the memory marches return a failure. */
/* */
/* OUTPUTS: */
/* Displays which pass on the memory test is executing */
/* */
/* RETURNS: */
/* 0 - Passed test */
/* 1 - Failed test */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
int mem_test_walk(void)
{
unsigned long long mask;
volatile unsigned long long * pmem =
(volatile unsigned long long *)CFG_SDRAM_BASE ;
const unsigned long size = (CFG_SDRAM_SIZE * 1024 * 1024)/8;
unsigned int i;
mask = 0x01;
printf("Initial Pass");
mem_march(pmem,size,0x0,0x1,0,1);
printf("\b\b\b\b\b\b\b\b\b\b\b\b");
printf(" ");
printf("\b\b\b\b\b\b\b\b\b\b\b\b");
for (i = 0 ; i < 63 ; i++) {
printf("Pass %2d", i+2);
if ( mem_march(pmem,size, mask,mask << 1, 1, 1) != 0 ){
/*printf("mask: 0x%x, pass: %d, ", mask, i);*/
return 1;
}
mask = mask<<1;
printf("\b\b\b\b\b\b\b");
}
printf("Last Pass");
if (mem_march(pmem, size, 0, mask, 0, 1) != 0) {
/* printf("mask: 0x%x", mask); */
return 1;
}
printf("\b\b\b\b\b\b\b\b\b");
printf(" ");
printf("\b\b\b\b\b\b\b\b\b");
return 0;
}
/*********************************************************************/
/* NAME: testdram() - calls any enabled memory tests */
/* */
/* DESCRIPTION: */
/* Runs memory tests if the environment test variables are set to */
/* 'y'. */
/* */
/* INPUTS: */
/* testdramdata - If set to 'y', data test is run. */
/* testdramaddress - If set to 'y', address test is run. */
/* testdramwalk - If set to 'y', walking ones test is run */
/* */
/* OUTPUTS: */
/* None */
/* */
/* RETURNS: */
/* 0 - Passed test */
/* 1 - Failed test */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
int testdram(void)
{
char *s;
int rundata, runaddress, runwalk;
s = getenv ("testdramdata");
rundata = (s && (*s == 'y')) ? 1 : 0;
s = getenv ("testdramaddress");
runaddress = (s && (*s == 'y')) ? 1 : 0;
s = getenv ("testdramwalk");
runwalk = (s && (*s == 'y')) ? 1 : 0;
if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
printf("Testing RAM ... ");
}
#ifdef CFG_DRAM_TEST_DATA
if (rundata == 1) {
if (mem_test_data() == 1){
return 1;
}
}
#endif
#ifdef CFG_DRAM_TEST_ADDRESS
if (runaddress == 1) {
if (mem_test_address() == 1){
return 1;
}
}
#endif
#ifdef CFG_DRAM_TEST_WALK
if (runwalk == 1) {
if (mem_test_walk() == 1){
return 1;
}
}
#endif
if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
printf("passed");
}
return 0;
}
#endif /* CFG_DRAM_TEST */
/*********************************************************************/
/* NAME: initdram() - initializes SDRAM controller */
/* */
/* DESCRIPTION: */
/* Initializes the MPC8260's SDRAM controller. */
/* */
/* INPUTS: */
/* CFG_IMMR - MPC8260 Internal memory map */
/* CFG_SDRAM_BASE - Physical start address of SDRAM */
/* CFG_PSDMR - SDRAM mode register */
/* CFG_MPTPR - Memory refresh timer prescaler register */
/* CFG_SDRAM0_SIZE - SDRAM size */
/* */
/* RETURNS: */
/* SDRAM size in bytes */
/* */
/* RESTRICTIONS/LIMITATIONS: */
/* */
/* */
/*********************************************************************/
long int initdram(int board_type)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
volatile uchar c = 0, *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8);
ulong psdmr = CFG_PSDMR;
int i;
/*
* Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
*
* "At system reset, initialization software must set up the
* programmable parameters in the memory controller banks registers
* (ORx, BRx, P/LSDMR). After all memory parameters are configured,
* system software should execute the following initialization sequence
* for each SDRAM device.
*
* 1. Issue a PRECHARGE-ALL-BANKS command
* 2. Issue eight CBR REFRESH commands
* 3. Issue a MODE-SET command to initialize the mode register
*
* The initial commands are executed by setting P/LSDMR[OP] and
* accessing the SDRAM with a single-byte transaction."
*
* The appropriate BRx/ORx registers have already been set when we
* get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
*/
memctl->memc_psrt = CFG_PSRT;
memctl->memc_mptpr = CFG_MPTPR;
memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
*ramaddr = c;
memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
for (i = 0; i < 8; i++){
*ramaddr = c;
}
memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
*ramaddr = c;
memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
*ramaddr = c;
/* return total ram size */
return (CFG_SDRAM0_SIZE * 1024 * 1024);
}
/*********************************************************************/
/* End of gw8260.c */
/*********************************************************************/

719
board/mvs1/flash.c Normal file
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@ -0,0 +1,719 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Changes for MATRIX Vision MVsensor (C) Copyright 2001
* MATRIX Vision GmbH / hg, info@matrix-vision.de
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc8xx.h>
#undef MVDEBUG
#ifdef MVDEBUG
#define mvdebug debug
#else
#define mvdebug(p) do {} while (0)
#endif
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
#ifdef CONFIG_MVS_16BIT_FLASH
#define FLASH_DATA_MASK 0xffff
#define FLASH_SHIFT 0
#else
#define FLASH_DATA_MASK 0xffffffff
#define FLASH_SHIFT 1
#endif
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size (vu_long *address, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
static void flash_get_offsets (ulong base, flash_info_t *info);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0, size_b1;
int i;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
}
#if defined (FLASH_BASE1_PRELIM)
size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
if (size_b1 > size_b0) {
printf ("## ERROR: "
"Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
size_b1, size_b1<<20,
size_b0, size_b0<<20
);
flash_info[0].flash_id = FLASH_UNKNOWN;
flash_info[1].flash_id = FLASH_UNKNOWN;
flash_info[0].sector_count = -1;
flash_info[1].sector_count = -1;
flash_info[0].size = 0;
flash_info[1].size = 0;
return (0);
}
#else
size_b1 = 0;
#endif
/* Remap FLASH according to real size */
memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
#ifdef CONFIG_MVS_16BIT_FLASH
memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
#else
memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_32 | BR_MS_GPCM | BR_V;
#endif
/* Re-do sizing to get full correct info */
size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
&flash_info[0]);
if (size_b1) {
memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
#ifdef CONFIG_MVS_16BIT_FLASH
memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
BR_PS_16 | BR_MS_GPCM | BR_V;
#else
memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
BR_PS_32 | BR_MS_GPCM | BR_V;
#endif
/* Re-do sizing to get full correct info */
size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
&flash_info[1]);
flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
&flash_info[1]);
} else {
memctl->memc_br1 = 0; /* invalidate bank */
flash_info[1].flash_id = FLASH_UNKNOWN;
flash_info[1].sector_count = -1;
}
flash_info[0].size = size_b0;
flash_info[1].size = size_b1;
return (size_b0 + size_b1);
}
/*-----------------------------------------------------------------------
*/
static void flash_get_offsets (ulong base, flash_info_t *info)
{
int i;
/* set up sector start address table */
if (info->flash_id & FLASH_BTYPE)
{ /* bottom boot sector types - these are the useful ones! */
/* set sector offsets for bottom boot block type */
if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B)
{ /* AMDLV320B has 8 x 8k bottom boot sectors */
for (i = 0; i < 8; i++) /* +8k */
info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
for (; i < info->sector_count; i++) /* +64k */
info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00070000 << FLASH_SHIFT);
}
else
{ /* other types have 4 bottom boot sectors (16,8,8,32) */
i = 0;
info->start[i++] = base + 0x00000000; /* - */
info->start[i++] = base + (0x00004000 << FLASH_SHIFT); /* +16k */
info->start[i++] = base + (0x00006000 << FLASH_SHIFT); /* +8k */
info->start[i++] = base + (0x00008000 << FLASH_SHIFT); /* +8k */
info->start[i++] = base + (0x00010000 << FLASH_SHIFT); /* +32k */
for (; i < info->sector_count; i++) /* +64k */
info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00030000 << FLASH_SHIFT);
}
}
else
{ /* top boot sector types - not so useful */
/* set sector offsets for top boot block type */
if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T)
{ /* AMDLV320T has 8 x 8k top boot sectors */
for (i = 0; i < info->sector_count - 8; i++) /* +64k */
info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
for (; i < info->sector_count; i++) /* +8k */
info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
}
else
{ /* other types have 4 top boot sectors (32,8,8,16) */
for (i = 0; i < info->sector_count - 4; i++) /* +64k */
info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
info->start[i++] = base + info->size - (0x00010000 << FLASH_SHIFT); /* -32k */
info->start[i++] = base + info->size - (0x00008000 << FLASH_SHIFT); /* -8k */
info->start[i++] = base + info->size - (0x00006000 << FLASH_SHIFT); /* -8k */
info->start[i] = base + info->size - (0x00004000 << FLASH_SHIFT); /* -16k */
}
}
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t *info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_AMD: printf ("AMD "); break;
case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
case FLASH_MAN_STM: printf ("ST "); break;
default: printf ("Unknown Vendor "); break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
break;
case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
break;
case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
break;
case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
break;
case FLASH_STMW320DB: printf ("M29W320B (32 Mbit, bottom boot sect)\n");
break;
case FLASH_STMW320DT: printf ("M29W320T (32 Mbit, top boot sector)\n");
break;
default: printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
}
printf ("\n");
}
/*-----------------------------------------------------------------------
*/
/*-----------------------------------------------------------------------
*/
/*
* The following code cannot be run from FLASH!
*/
#define AMD_ID_LV160T_MVS (AMD_ID_LV160T & FLASH_DATA_MASK)
#define AMD_ID_LV160B_MVS (AMD_ID_LV160B & FLASH_DATA_MASK)
#define AMD_ID_LV320T_MVS (AMD_ID_LV320T & FLASH_DATA_MASK)
#define AMD_ID_LV320B_MVS (AMD_ID_LV320B & FLASH_DATA_MASK)
#define STM_ID_W320DT_MVS (STM_ID_29W320DT & FLASH_DATA_MASK)
#define STM_ID_W320DB_MVS (STM_ID_29W320DB & FLASH_DATA_MASK)
#define AMD_MANUFACT_MVS (AMD_MANUFACT & FLASH_DATA_MASK)
#define FUJ_MANUFACT_MVS (FUJ_MANUFACT & FLASH_DATA_MASK)
#define STM_MANUFACT_MVS (STM_MANUFACT & FLASH_DATA_MASK)
#define AUTOSELECT_ADDR1 0x0555
#define AUTOSELECT_ADDR2 0x02AA
#define AUTOSELECT_ADDR3 AUTOSELECT_ADDR1
#define AUTOSELECT_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
#define AUTOSELECT_DATA2 (0x00550055 & FLASH_DATA_MASK)
#define AUTOSELECT_DATA3 (0x00900090 & FLASH_DATA_MASK)
#define RESET_BANK_DATA (0x00F000F0 & FLASH_DATA_MASK)
static ulong flash_get_size (vu_long *address, flash_info_t *info)
{
short i;
#ifdef CONFIG_MVS_16BIT_FLASH
ushort value;
vu_short *addr = (vu_short *)address;
#else
ulong value;
vu_long *addr = (vu_long *)address;
#endif
ulong base = (ulong)address;
/* Write auto select command: read Manufacturer ID */
addr[AUTOSELECT_ADDR1] = AUTOSELECT_DATA1;
addr[AUTOSELECT_ADDR2] = AUTOSELECT_DATA2;
addr[AUTOSELECT_ADDR3] = AUTOSELECT_DATA3;
value = addr[0]; /* manufacturer ID */
switch (value) {
case AMD_MANUFACT_MVS:
info->flash_id = FLASH_MAN_AMD;
break;
case FUJ_MANUFACT_MVS:
info->flash_id = FLASH_MAN_FUJ;
break;
case STM_MANUFACT_MVS:
info->flash_id = FLASH_MAN_STM;
break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
return (0); /* no or unknown flash */
}
value = addr[1]; /* device ID */
switch (value) {
case AMD_ID_LV160T_MVS:
info->flash_id += FLASH_AM160T;
info->sector_count = 37;
info->size = (0x00200000 << FLASH_SHIFT);
break; /* => 2 or 4 MB */
case AMD_ID_LV160B_MVS:
info->flash_id += FLASH_AM160B;
info->sector_count = 37;
info->size = (0x00200000 << FLASH_SHIFT);
break; /* => 2 or 4 MB */
case AMD_ID_LV320T_MVS:
info->flash_id += FLASH_AM320T;
info->sector_count = 71;
info->size = (0x00400000 << FLASH_SHIFT);
break; /* => 4 or 8 MB */
case AMD_ID_LV320B_MVS:
info->flash_id += FLASH_AM320B;
info->sector_count = 71;
info->size = (0x00400000 << FLASH_SHIFT);
break; /* => 4 or 8MB */
case STM_ID_W320DT_MVS:
info->flash_id += FLASH_STMW320DT;
info->sector_count = 67;
info->size = (0x00400000 << FLASH_SHIFT);
break; /* => 4 or 8 MB */
case STM_ID_W320DB_MVS:
info->flash_id += FLASH_STMW320DB;
info->sector_count = 67;
info->size = (0x00400000 << FLASH_SHIFT);
break; /* => 4 or 8MB */
default:
info->flash_id = FLASH_UNKNOWN;
return (0); /* => no or unknown flash */
}
/* set up sector start address table */
flash_get_offsets (base, info);
/* check for protected sectors */
for (i = 0; i < info->sector_count; i++) {
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
/* D0 = 1 if protected */
#ifdef CONFIG_MVS_16BIT_FLASH
addr = (vu_short *)(info->start[i]);
#else
addr = (vu_long *)(info->start[i]);
#endif
info->protect[i] = addr[2] & 1;
}
/*
* Prevent writes to uninitialized FLASH.
*/
if (info->flash_id != FLASH_UNKNOWN) {
#ifdef CONFIG_MVS_16BIT_FLASH
addr = (vu_short *)info->start[0];
#else
addr = (vu_long *)info->start[0];
#endif
*addr = RESET_BANK_DATA; /* reset bank */
}
return (info->size);
}
/*-----------------------------------------------------------------------
*/
#define ERASE_ADDR1 0x0555
#define ERASE_ADDR2 0x02AA
#define ERASE_ADDR3 ERASE_ADDR1
#define ERASE_ADDR4 ERASE_ADDR1
#define ERASE_ADDR5 ERASE_ADDR2
#define ERASE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
#define ERASE_DATA2 (0x00550055 & FLASH_DATA_MASK)
#define ERASE_DATA3 (0x00800080 & FLASH_DATA_MASK)
#define ERASE_DATA4 ERASE_DATA1
#define ERASE_DATA5 ERASE_DATA2
#define ERASE_SECTOR_DATA (0x00300030 & FLASH_DATA_MASK)
#define ERASE_CHIP_DATA (0x00100010 & FLASH_DATA_MASK)
#define ERASE_CONFIRM_DATA (0x00800080 & FLASH_DATA_MASK)
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
#ifdef CONFIG_MVS_16BIT_FLASH
vu_short *addr = (vu_short *)(info->start[0]);
#else
vu_long *addr = (vu_long *)(info->start[0]);
#endif
int flag, prot, sect, l_sect;
ulong start, now, last;
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
if ((info->flash_id == FLASH_UNKNOWN) ||
(info->flash_id > FLASH_AMD_COMP)) {
printf ("Can't erase unknown flash type %08lx - aborted\n",
info->flash_id);
return 1;
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf ("\n");
}
l_sect = -1;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[ERASE_ADDR1] = ERASE_DATA1;
addr[ERASE_ADDR2] = ERASE_DATA2;
addr[ERASE_ADDR3] = ERASE_DATA3;
addr[ERASE_ADDR4] = ERASE_DATA4;
addr[ERASE_ADDR5] = ERASE_DATA5;
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
#ifdef CONFIG_MVS_16BIT_FLASH
addr = (vu_short *)(info->start[sect]);
#else
addr = (vu_long *)(info->start[sect]);
#endif
addr[0] = ERASE_SECTOR_DATA;
l_sect = sect;
}
}
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
/*
* We wait for the last triggered sector
*/
if (l_sect < 0)
goto DONE;
start = get_timer (0);
last = start;
#ifdef CONFIG_MVS_16BIT_FLASH
addr = (vu_short *)(info->start[l_sect]);
#else
addr = (vu_long *)(info->start[l_sect]);
#endif
while ((addr[0] & ERASE_CONFIRM_DATA) != ERASE_CONFIRM_DATA) {
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
putc ('.');
last = now;
}
}
DONE:
/* reset to read mode */
#ifdef CONFIG_MVS_16BIT_FLASH
addr = (vu_short *)info->start[0];
#else
addr = (vu_long *)info->start[0];
#endif
addr[0] = RESET_BANK_DATA; /* reset bank */
printf (" done\n");
return 0;
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
#define BUFF_INC 4
ulong cp, wp, data;
int i, l, rc;
mvdebug (("+write_buff %p ==> 0x%08lx, count = 0x%08lx\n", src, addr, cnt));
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
mvdebug ((" handle unaligned start bytes (cnt = 0x%08%lx)\n", cnt));
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
for (; i<BUFF_INC && cnt>0; ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt==0 && i<BUFF_INC; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += BUFF_INC;
}
/*
* handle (half)word aligned part
*/
mvdebug ((" handle word aligned part (cnt = 0x%08%lx)\n", cnt));
while (cnt >= BUFF_INC) {
data = 0;
for (i=0; i<BUFF_INC; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += BUFF_INC;
cnt -= BUFF_INC;
}
if (cnt == 0) {
return (0);
}
/*
* handle unaligned tail bytes
*/
mvdebug ((" handle unaligned tail bytes (cnt = 0x%08%lx)\n", cnt));
data = 0;
for (i=0, cp=wp; i<BUFF_INC && cnt>0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i<BUFF_INC; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
return (write_word(info, wp, data));
}
#define WRITE_ADDR1 0x0555
#define WRITE_ADDR2 0x02AA
#define WRITE_ADDR3 WRITE_ADDR1
#define WRITE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
#define WRITE_DATA2 (0x00550055 & FLASH_DATA_MASK)
#define WRITE_DATA3 (0x00A000A0 & FLASH_DATA_MASK)
#define WRITE_CONFIRM_DATA ERASE_CONFIRM_DATA
#ifndef CONFIG_MVS_16BIT_FLASH
/*-----------------------------------------------------------------------
* Write a word to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_word (flash_info_t *info, ulong dest, ulong data)
{
vu_long *addr = (vu_long *)(info->start[0]);
ulong start;
int flag;
mvdebug (("+write_word (to 0x%08lx)\n", dest));
/* Check if Flash is (sufficiently) erased */
if ((*((vu_long *)dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[WRITE_ADDR1] = WRITE_DATA1;
addr[WRITE_ADDR2] = WRITE_DATA2;
addr[WRITE_ADDR3] = WRITE_DATA3;
*((vu_long *)dest) = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
addr = (vu_long *)dest;
while ((*addr & WRITE_CONFIRM_DATA) != (data & WRITE_CONFIRM_DATA)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
mvdebug (("-write_word\n"));
return (0);
}
#else /* CONFIG_MVS_16BIT_FLASH */
/*-----------------------------------------------------------------------
* Write a halfword to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_halfword (flash_info_t *info, ulong dest, ushort data)
{
vu_short *addr = (vu_short *)(info->start[0]);
ulong start;
int flag;
mvdebug (("+write_halfword (to 0x%08lx)\n", dest));
/* Check if Flash is (sufficiently) erased */
if ((*((vu_short *)dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[WRITE_ADDR1] = WRITE_DATA1;
addr[WRITE_ADDR2] = WRITE_DATA2;
addr[WRITE_ADDR3] = WRITE_DATA3;
*((vu_short *)dest) = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
addr = (vu_short *)dest;
while ((*addr & WRITE_CONFIRM_DATA) != (data & WRITE_CONFIRM_DATA)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
mvdebug (("-write_halfword\n"));
return (0);
}
/*-----------------------------------------------------------------------
* Write a word to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_word (flash_info_t *info, ulong dest, ulong data)
{
int result = 0;
if (write_halfword (info, dest, (data & ~FLASH_DATA_MASK) >> 16) == 0)
{
dest += 2;
data = data & FLASH_DATA_MASK;
result = write_halfword (info, dest, data);
}
return result;
}
#endif
/*-----------------------------------------------------------------------
*/