sysmo-bts
/
u-boot
9
0
Fork 0
Code Pull Requests Releases Activity

mtd: nand: omap: add CONFIG_SPL_NAND_DEVICE_WIDTH to determine NAND device bus-width 

This patch adds CONFIG_SPL_NAND_DEVICE_WIDTH to specify bus-width of NAND device
  CONFIG_SPL_NAND_DEVICE_WIDTH == 16: NAND device with x16 bus-width
  CONFIG_SPL_NAND_DEVICE_WIDTH == 8:  NAND device with x8 bus-width

Need for a separate CONFIG_xx arise from following situations.
(1) SPL NAND drivers does not have framework to parse ONFI parameter page.

(2) if !defined(CONFIG_SYS_NAND_SELF_INIT)
         |- board_nand_init()
         |- nand_scan()
               |- nand_scan_ident()
               |- nand_scan_tail()
   This means board_nand_init() is called before nand_scan_ident(). So NAND
   controller is initialized before the actual probing of NAND device.
   However some controller (like GPMC) need to be specifically configured for
   bus-width of NAND device.
   In such cases, bus-width of the NAND device should be known in advance
   of actual device probing. Hence, CONFIG_SPL_NAND_DEVICE_WIDTH is useful.

(3) Non-ONFI compliant devices need some mechanism to specify device bus-width
   to driver.

Signed-off-by: Pekon Gupta <pekon@ti.com>
This commit is contained in:
Pekon Gupta 2013-12-05 02:11:03 +05:30 committed by Tom Rini
parent a67b4401d7
commit 9e6155b923
23 changed files with 40 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
doc/README.nand
View File

@ -180,6 +180,15 @@ Configuration Options:
This is used by SoC platforms which do not have built-in ELM
hardware engine required for BCH ECC correction.
CONFIG_SPL_NAND_DEVICE_WIDTH
Specifies bus-width of the default NAND device connected to SoC.
This config is useful for driver which cannot self initialize or
parse ONFI parameter (like SPL drivers), or for supporting non-ONFI
compliant devices.
This config can take following values:
- 8: x8 NAND devices is connected
- 16: x16 NAND device is connected
Platform specific options
=========================

14
drivers/mtd/nand/omap_gpmc.c
View File

@ -856,13 +856,19 @@ int board_nand_init(struct nand_chip *nand)
nand->priv = &bch_priv;
nand->cmd_ctrl = omap_nand_hwcontrol;
nand->options |= NAND_NO_PADDING | NAND_CACHEPRG;
/* If we are 16 bit dev, our gpmc config tells us that */
if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000)
nand->options |= NAND_BUSWIDTH_16;
nand->chip_delay = 100;
nand->ecc.layout = &omap_ecclayout;
/* configure driver and controller based on NAND device bus-width */
gpmc_config = readl(&gpmc_cfg->cs[cs].config1);
if (CONFIG_SPL_NAND_DEVICE_WIDTH == 16) {
nand->options |= NAND_BUSWIDTH_16;
writel(gpmc_config | (0x1 << 12), &gpmc_cfg->cs[cs].config1);
} else {
nand->options &= ~NAND_BUSWIDTH_16;
writel(gpmc_config & ~(0x1 << 12), &gpmc_cfg->cs[cs].config1);
}
/* select ECC scheme */
#if defined(CONFIG_NAND_OMAP_ECCSCHEME)
err = omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME,

1
include/configs/am335x_evm.h
View File

@ -206,6 +206,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)

1
include/configs/am3517_crane.h
View File

@ -335,6 +335,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
10, 11, 12, 13}

1
include/configs/am3517_evm.h
View File

@ -329,6 +329,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
10, 11, 12, 13}

1
include/configs/am43xx_evm.h
View File

@ -211,6 +211,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 4096
#define CONFIG_SYS_NAND_OOBSIZE 224
#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)

1
include/configs/cm_t35.h
View File

@ -166,6 +166,7 @@
/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
/* Environment information */
#define CONFIG_BOOTDELAY 10
#define CONFIG_ZERO_BOOTDELAY_CHECK

1
include/configs/devkit8000.h
View File

@ -320,6 +320,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
10, 11, 12, 13}

1
include/configs/dig297.h
View File

@ -143,6 +143,7 @@
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* to access nand at */
/* CS0 */
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
#if defined(CONFIG_CMD_NET)

1
include/configs/dra7xx_evm.h
View File

@ -103,6 +103,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
/* NAND: driver related configs */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM

1
include/configs/igep0033.h
View File

@ -253,6 +253,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \

1
include/configs/igep00x0.h
View File

@ -357,6 +357,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
10, 11, 12, 13}

1
include/configs/mcx.h
View File

@ -387,6 +387,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\

1
include/configs/omap3_beagle.h
View File

@ -426,6 +426,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
10, 11, 12, 13}

2
include/configs/omap3_evm_common.h
View File

@ -122,7 +122,7 @@
/* Max number of NAND devices */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
/* Timeout values (in ticks) */
#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)

1
include/configs/omap3_logic.h
View File

@ -298,6 +298,7 @@
#if defined(CONFIG_CMD_NAND)
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#endif

1
include/configs/omap3_overo.h
View File

@ -319,6 +319,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
10, 11, 12, 13}

2
include/configs/omap3_pandora.h
View File

@ -133,7 +133,7 @@
/* at CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#ifdef CONFIG_CMD_NAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS

1
include/configs/omap3_zoom1.h
View File

@ -140,6 +140,7 @@
/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_JFFS2_NAND
/* nand device jffs2 lives on */
#define CONFIG_JFFS2_DEV "nand0"

1
include/configs/omap3_zoom2.h
View File

@ -159,6 +159,7 @@
/* to access nand at */
/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
/* Environment information */
#define CONFIG_BOOTDELAY 10

1
include/configs/siemens-am33x-common.h
View File

@ -187,6 +187,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \

1
include/configs/tam3517-common.h
View File

@ -254,6 +254,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 16
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\

1
include/configs/tricorder.h
View File

@ -286,6 +286,7 @@
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SPL_NAND_DEVICE_WIDTH 8
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\
21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\