powerpc: T1024RDB: Remove macro CONFIG_T1024RDB

Use TARGET_T1024RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Get missing hunk in board/freescale/t102xrdb/ddr.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
York Sun 2016-12-28 08:43:34 -08:00 committed by Tom Rini
parent 9082405d47
commit 960286b6d9
11 changed files with 25 additions and 28 deletions

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@ -8,7 +8,7 @@ ifdef CONFIG_SPL_BUILD
obj-y += spl.o
else
obj-y += t102xrdb.o
obj-$(CONFIG_T1024RDB) += cpld.o
obj-$(CONFIG_TARGET_T1024RDB) += cpld.o
obj-y += eth_t102xrdb.o
obj-$(CONFIG_PCI) += pci.o
endif

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@ -140,7 +140,7 @@ found:
popts->wrlvl_ctl_2 = 0x07070606;
popts->half_strength_driver_enable = 1;
popts->cpo_sample = 0x43;
#elif defined(CONFIG_T1024RDB)
#elif defined(CONFIG_TARGET_T1024RDB)
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x52;
#endif

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@ -58,7 +58,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY1_ADDR);
switch (srds_s1) {
#ifdef CONFIG_T1024RDB
#ifdef CONFIG_TARGET_T1024RDB
case 0x95:
/* set the on-board RGMII2 PHY */
fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY2_ADDR);
@ -94,7 +94,7 @@ int board_eth_init(bd_t *bis)
case PHY_INTERFACE_MODE_SGMII:
#if defined(CONFIG_TARGET_T1023RDB)
dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
#elif defined(CONFIG_T1024RDB)
#elif defined(CONFIG_TARGET_T1024RDB)
dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
#endif
fm_info_set_mdio(i, dev);
@ -128,7 +128,7 @@ int board_eth_init(bd_t *bis)
void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
enum fm_port port, int offset)
{
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
if (((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) ||
(fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII)) &&
(port == FM1_DTSEC3)) {

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@ -17,7 +17,7 @@
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
#include "t102xrdb.h"
#ifdef CONFIG_T1024RDB
#ifdef CONFIG_TARGET_T1024RDB
#include "cpld.h"
#elif defined(CONFIG_TARGET_T1023RDB)
#include <i2c.h>
@ -51,7 +51,7 @@ int checkboard(void)
srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
printf("Board: %sRDB, ", cpu->name);
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
CPLD_READ(hw_ver), CPLD_READ(sw_ver));
#elif defined(CONFIG_TARGET_T1023RDB)
@ -63,7 +63,7 @@ int checkboard(void)
puts("SD/MMC\n");
#elif CONFIG_SPIFLASH
puts("SPI\n");
#elif defined(CONFIG_T1024RDB)
#elif defined(CONFIG_TARGET_T1024RDB)
u8 reg;
reg = CPLD_READ(flash_csr);
@ -91,7 +91,7 @@ int checkboard(void)
return 0;
}
#ifdef CONFIG_T1024RDB
#ifdef CONFIG_TARGET_T1024RDB
static void board_mux_lane(void)
{
ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@ -150,7 +150,7 @@ int board_early_init_r(void)
0, flash_esel, BOOKE_PAGESZ_256M, 1);
#endif
#ifdef CONFIG_T1024RDB
#ifdef CONFIG_TARGET_T1024RDB
board_mux_lane();
#endif

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@ -12,7 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y

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@ -12,7 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y

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@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="T1024RDB"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y

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@ -13,7 +13,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y

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@ -5,7 +5,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="T1024RDB"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y

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@ -60,7 +60,7 @@
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg
@ -79,7 +79,7 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_spi_rcw.cfg
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg
@ -98,7 +98,7 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_sd_rcw.cfg
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg
@ -175,7 +175,7 @@
#define CONFIG_ENV_SPI_MODE 0
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_ENV_SECT_SIZE 0x10000
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_ENV_SECT_SIZE 0x40000
@ -190,7 +190,7 @@
#define CONFIG_SYS_EXTRA_ENV_RELOC
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE 0x2000
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_ENV_OFFSET (2 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
@ -271,7 +271,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_FSL_DDR_INTERACTIVE
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM 0
@ -301,7 +301,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024)
/* NOR Flash Timing Params */
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(0) | \
@ -330,7 +330,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS}
#ifdef CONFIG_T1024RDB
#ifdef CONFIG_TARGET_T1024RDB
/* CPLD on IFC */
#define CONFIG_SYS_CPLD_BASE 0xffdf0000
#define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE)
@ -369,7 +369,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_V)
#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024)
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
| CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
| CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
@ -706,7 +706,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_DPAA_FMAN
#ifdef CONFIG_T1024RDB
#ifdef CONFIG_TARGET_T1024RDB
#define CONFIG_QE
#define CONFIG_U_QE
#endif
@ -730,7 +730,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
#elif defined(CONFIG_NAND)
#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_TARGET_T1023RDB)
@ -761,7 +761,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_REALTEK
#define CONFIG_PHY_AQUANTIA
#if defined(CONFIG_T1024RDB)
#if defined(CONFIG_TARGET_T1024RDB)
#define RGMII_PHY1_ADDR 0x2
#define RGMII_PHY2_ADDR 0x6
#define SGMII_AQR_PHY_ADDR 0x2

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@ -7792,7 +7792,6 @@ CONFIG_SYS_XWAY_EBU_BOOTCFG
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_i2C_FSL
CONFIG_T1024RDB
CONFIG_T1040QDS
CONFIG_T2080QDS
CONFIG_T2080RDB