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pci: mvebu: Fix Armada 38x support 

Armada 38x has four PCI ports, not three.

The optimization in pci_init_board() seems to assume that every port has
three lanes. This is obviously wrong, and breaks support for Armada 38x.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Dirk Eibach 2017-01-11 16:00:45 +01:00 committed by Stefan Roese
parent 143199081b
commit 882d3fa6dd
2 changed files with 14 additions and 12 deletions
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1
arch/arm/mach-mvebu/include/mach/soc.h
View File

@ -67,6 +67,7 @@
#define MVEBU_REG_PCIE_BASE (MVEBU_REGISTER(0x40000))
#define MVEBU_AXP_USB_BASE (MVEBU_REGISTER(0x50000))
#define MVEBU_USB20_BASE (MVEBU_REGISTER(0x58000))
#define MVEBU_REG_PCIE0_BASE (MVEBU_REGISTER(0x80000))
#define MVEBU_AXP_SATA_BASE (MVEBU_REGISTER(0xa0000))
#define MVEBU_SATA0_BASE (MVEBU_REGISTER(0xa8000))
#define MVEBU_NAND_BASE (MVEBU_REGISTER(0xd0000))

25
drivers/pci/pci_mvebu.c
View File

@ -91,25 +91,26 @@ static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;
#if defined(CONFIG_ARMADA_38X)
#define PCIE_BASE(if) \
((if) == 0 ? \
MVEBU_REG_PCIE_BASE + 0x40000 : \
MVEBU_REG_PCIE_BASE + 0x4000 * (if))
MVEBU_REG_PCIE0_BASE : \
(MVEBU_REG_PCIE_BASE + 0x4000 * (if - 1)))
/*
* On A38x MV6820 these PEX ports are supported:
* 0 - Port 0.0
* 1 - Port 0.1
* 2 - Port 0.2
* 1 - Port 1.0
* 2 - Port 2.0
* 3 - Port 3.0
*/
#define MAX_PEX 3
#define MAX_PEX 4
static struct mvebu_pcie pcie_bus[MAX_PEX];
static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx,
int *mem_target, int *mem_attr)
{
u8 port[] = { 0, 1, 2 };
u8 lane[] = { 0, 0, 0 };
u8 target[] = { 8, 4, 4 };
u8 attr[] = { 0xe8, 0xe8, 0xd8 };
u8 port[] = { 0, 1, 2, 3 };
u8 lane[] = { 0, 0, 0, 0 };
u8 target[] = { 8, 4, 4, 4 };
u8 attr[] = { 0xe8, 0xe8, 0xd8, 0xb8 };
pcie->port = port[pex_idx];
pcie->lane = lane[pex_idx];
@ -351,9 +352,9 @@ void pci_init_board(void)
mvebu_get_port_lane(pcie, i, &mem_target, &mem_attr);
/* Don't read at all from pci registers if port power is down */
if (pcie->lane == 0 && SELECT(soc_ctrl, pcie->port) == 0) {
i += 3;
debug("%s: skipping port %d\n", __func__, pcie->port);
if (SELECT(soc_ctrl, pcie->port) == 0) {
if (pcie->lane == 0)
debug("%s: skipping port %d\n", __func__, pcie->port);
continue;
}