From 861e94936c354f24fbc1f94aff3589c120dbeab9 Mon Sep 17 00:00:00 2001 From: Sricharan R Date: Tue, 4 Feb 2014 19:07:36 +0530 Subject: [PATCH] ARM: DRA: Fix period calculation in iodelay recalib sequence A divider of 5 is required to get the right period value to be set for a given sysclk frequency. This is a fixed-constant for all sysclks. Signed-off-by: Sricharan R --- arch/arm/cpu/armv7/omap5/hw_data.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index a7dd17e8b0..0d7590df74 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -327,6 +327,7 @@ void recalibrate_io_delay(void) /* period in ps */ period = mhz / (period/mhz); + period /= 5; writel(temp | period, (*ctrl)->iodelay_config_reg_2); /*