mmc: move CONFIG_DWMMC to Kconfig, renaming to CONFIG_MMC_DW

This commit was created as follows: [1] Rename the option with the following command: find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e 's/CONFIG_DWMMC/CONFIG_MMC_DW/g' [2] create the entry for MMC_DW in drivers/mmc/Kconfig (the prompt and help were copied from Linux) [3] run "tools/moveconfig.py -y MMC_DW" [4] add "depends on MMC_DW" to the MMC_DW_ROCKCHIP entry [5] Clean-up doc/README.socfpga by hand Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-10 13:32:04 +09:00 · 2017-01-10 13:32:04 +09:00 · 55ed3b4698
parent fed4408703
commit 55ed3b4698
50 changed files with 49 additions and 13 deletions
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@ -347,7 +347,7 @@ static int init_dwmmc(void)
 {
 	int ret;

-#ifdef CONFIG_DWMMC
+#ifdef CONFIG_MMC_DW

 	/* mmc0 clocks are already configured by ATF */
 	ret = hi6220_pinmux_config(PERIPH_ID_SDMMC0);
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@ -260,7 +260,7 @@ static int init_mmc(void)

 static int init_dwmmc(void)
 {
-#ifdef CONFIG_DWMMC
+#ifdef CONFIG_MMC_DW
 	return exynos_dwmmc_init(gd->fdt_blob);
 #else
 	return 0;
--- a/configs/arndale_defconfig
+++ b/configs/arndale_defconfig
@ -22,6 +22,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_SOUND=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SOUND=y
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_SYS_I2C_DW=y
+CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_DM_SERIAL=y
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_SYS_I2C_DW=y
+CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_DM_SERIAL=y
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@ -50,6 +50,7 @@ CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@ -51,6 +51,7 @@ CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@ -51,6 +51,7 @@ CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@ -29,6 +29,7 @@ CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_ROCKCHIP_RK3036_PINCTRL=y
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@ -43,6 +43,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@ -20,6 +20,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_ROCKCHIP_SDHCI=y
 CONFIG_MMC_SDHCI=y
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@ -42,6 +42,7 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@ -43,6 +43,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
--- a/configs/hikey_defconfig
+++ b/configs/hikey_defconfig
@ -10,5 +10,6 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_CACHE=y
+CONFIG_MMC_DW=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@ -30,6 +30,7 @@ CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_ROCKCHIP_RK3036_PINCTRL=y
--- a/configs/miniarm-rk3288_defconfig
+++ b/configs/miniarm-rk3288_defconfig
@ -42,6 +42,7 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@ -26,6 +26,7 @@ CONFIG_ADC=y
 CONFIG_ADC_EXYNOS=y
 CONFIG_DFU_MMC=y
 CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_DM_PMIC=y
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@ -36,6 +36,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DFU_MMC=y
 CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DFU_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@ -32,6 +32,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y
 CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@ -32,6 +32,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y
 CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@ -42,6 +42,7 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@ -41,6 +41,7 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DFU_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
--- a/configs/smdk5250_defconfig
+++ b/configs/smdk5250_defconfig
@ -26,6 +26,7 @@ CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
--- a/configs/smdk5420_defconfig
+++ b/configs/smdk5420_defconfig
@ -23,6 +23,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
--- a/configs/smdkv310_defconfig
+++ b/configs/smdkv310_defconfig
@ -22,6 +22,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@ -33,6 +33,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y
 CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_I2C=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@ -43,6 +43,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@ -43,6 +43,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@ -40,6 +40,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@ -43,6 +43,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@ -44,6 +44,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@ -47,6 +47,7 @@ CONFIG_DFU_SF=y
 CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@ -33,6 +33,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y
 CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_I2C=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@ -32,6 +32,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DFU_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@ -31,6 +31,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_DFU_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
--- a/doc/README.socfpga
+++ b/doc/README.socfpga
@ -20,8 +20,5 @@ controller support within SOCFPGA
 #define CONFIG_SYS_MMC_MAX_BLK_COUNT	256
 -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM

-#define CONFIG_DWMMC
-> Enable the common DesignWare SDMMC controller framework
-
 #define CONFIG_SOCFPGA_DWMMC
 -> Enable the SOCFPGA specific driver for DesignWare SDMMC controller
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@ -68,9 +68,17 @@ config ATMEL_SDHCI
 	  It is compliant with the SD Host Controller Standard V3.0
 	  specification.

+config MMC_DW
+	bool "Synopsys DesignWare Memory Card Interface"
+	help
+	  This selects support for the Synopsys DesignWare Mobile Storage IP
+	  block, this provides host support for SD and MMC interfaces, in both
+	  PIO, internal DMA mode and external DMA mode.
+
 config MMC_DW_ROCKCHIP
 	bool "Rockchip SD/MMC controller support"
 	depends on DM_MMC && OF_CONTROL
+	depends on MMC_DW
 	help
 	  This enables support for the Rockchip SD/MMM controller, which is
 	  based on Designware IP. The device is compatible with at least
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@ -17,7 +17,7 @@ obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
 obj-$(CONFIG_ATMEL_SDHCI) += atmel_sdhci.o
 obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
 obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
-obj-$(CONFIG_DWMMC) += dw_mmc.o
+obj-$(CONFIG_MMC_DW) += dw_mmc.o
 obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
 obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o
 obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
--- a/include/configs/axs10x.h
+++ b/include/configs/axs10x.h
@ -86,7 +86,6 @@
 * SD/MMC configuration
 */
 #define CONFIG_GENERIC_MMC
-#define CONFIG_DWMMC
 #define CONFIG_DOS_PARTITION

 /*
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@ -39,7 +39,6 @@

 /* SD/MMC configuration */
 #define CONFIG_GENERIC_MMC
-#define CONFIG_DWMMC
 #define CONFIG_EXYNOS_DWMMC
 #define CONFIG_BOUNCE_BUFFER

--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@ -72,7 +72,6 @@

 /* SD/MMC configuration */
 #define CONFIG_GENERIC_MMC
-#define CONFIG_DWMMC
 #define CONFIG_HIKEY_DWMMC
 #define CONFIG_BOUNCE_BUFFER

--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@ -38,7 +38,6 @@

 /* MMC/SD IP block */
 #define CONFIG_GENERIC_MMC
-#define CONFIG_DWMMC
 #define CONFIG_BOUNCE_BUFFER

 #define CONFIG_FAT_WRITE
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@ -41,7 +41,6 @@

 /* MMC/SD IP block */
 #define CONFIG_GENERIC_MMC
-#define CONFIG_DWMMC
 #define CONFIG_BOUNCE_BUFFER

 #define CONFIG_FAT_WRITE
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@ -28,7 +28,6 @@

 /* MMC/SD IP block */
 #define CONFIG_GENERIC_MMC
-#define CONFIG_DWMMC
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000

--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@ -144,7 +144,6 @@
 #ifdef CONFIG_CMD_MMC
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_GENERIC_MMC
-#define CONFIG_DWMMC
 #define CONFIG_SOCFPGA_DWMMC
 /* FIXME */
 /* using smaller max blk cnt to avoid flooding the limited stack we have */