Create new header file and move peripherals base address from configs file to new header file.
Create new header file to include immap_5xxx.h and m5xxx.h and to share among drivers without update in driver file each processor is added. Moved peripherals base address and defines from configs file to immap.h. Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
This commit is contained in:
TsiChungLiew
John Rigby
parent
be296e31c4
commit
48dbfeabc7
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@ -0,0 +1,57 @@
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/*
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* ColdFire Internal Memory Map and Defines
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*
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __IMMAP_H
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#define __IMMAP_H
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#ifdef CONFIG_M5329
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#include <asm/immap_5329.h>
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#include <asm/m5329.h>
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#define CFG_FEC0_IOBASE (MMAP_FEC)
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#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x4000))
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#define CFG_MCFRTC_BASE (MMAP_RTC)
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/* Timer */
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#ifdef CONFIG_MCFTMR
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#define CFG_UDELAY_BASE (MMAP_DTMR0)
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#define CFG_TMR_BASE (MMAP_DTMR1)
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#define CFG_TMRINTR_NO (INT0_HI_DTMR1)
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#define CFG_TMRINTR_MASK (INTC_IPRH_INT33)
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#define CFG_TMRINTR_PRI (6)
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#define CFG_TIMER_PRESCALER (((CFG_CLK / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CFG_UDELAY_BASE (MMAP_PIT0)
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#define CFG_PIT_BASE (MMAP_PIT1)
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#define CFG_PIT_PRESCALE (6)
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#endif
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#define CFG_INTR_BASE (MMAP_INTC0)
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#define CFG_NUM_IRQS (128)
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#endif /* CONFIG_M5329 */
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#endif /* __IMMAP_H */
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@ -46,8 +46,6 @@
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#undef CONFIG_WATCHDOG
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#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
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#define CFG_NUM_IRQS 128
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#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
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CFG_CMD_CACHE | \
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CFG_CMD_DATE | \
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@ -70,7 +68,6 @@
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# define CFG_RX_ETH_BUFFER 8
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# define CFG_FAULT_ECHO_LINK_DOWN
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# define CFG_FEC0_IOBASE 0xFC030000
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# define CFG_FEC0_PINMUX 0
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# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
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# define MCFFEC_TOUT_LOOP 50000
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@ -86,41 +83,14 @@
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#endif
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#define CONFIG_MCFUART
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#ifdef CONFIG_MCFUART
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# define CFG_UART_PORT (0)
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# define CFG_UART_BASE (0xFC060000)
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#endif
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#define CFG_UART_PORT (0)
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#define CONFIG_MCFRTC
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#ifdef CONFIG_MCFRTC
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# define CFG_MCFRTC_BASE (0xFC0A8000)
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# undef RTC_DEBUG
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#endif
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#undef RTC_DEBUG
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/* Timer */
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#define CONFIG_MCFTMR
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#ifdef CONFIG_MCFTMR
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# define CFG_UDELAY_BASE (0xFC070000)
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# define CFG_TMR_BASE (0xFC074000)
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# define CFG_TMRINTR_NO (33)
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# define CFG_TMRINTR_MASK (2)
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# define CFG_TMRINTR_PRI (6)
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# define CFG_TIMER_PRESCALER (((CFG_CLK / 1000000) - 1) << 8)
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#endif
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#undef CONFIG_MCFPIT
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#ifdef CONFIG_MCFPIT
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# define CFG_UDELAY_BASE (0xFC080000)
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# define CFG_PIT_BASE (0xFC084000)
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# define CFG_PIT_PRESCALE (6)
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#endif
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#define CONFIG_MCFINTC
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#ifdef CONFIG_MCFINTC
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# define CFG_INTR_BASE (0xFC048000)
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# define CFG_NUM_IRQ0 64
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# define CFG_NUM_IRQ1 64
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#endif
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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@ -215,22 +185,18 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#undef CFG_FLASH_CFI
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#define CFG_FLASH_CFI
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#ifdef CFG_FLASH_CFI
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# define CFG_FLASH_CFI_DRIVER 1
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# define CFG_FLASH_SIZE 0x800000 /* Max size that the board might have */
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# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#else
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# define CFG_FLASH_UNLOCK_TOUT 1000
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# define CFG_FLASH_WRITE_TOUT 1000
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# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
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# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
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#endif
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#define CFG_FLASH_BASE 0
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#define CFG_FLASH0_BASE (CFG_CS0_BASE << 16)
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 1000
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#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
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/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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