tegra: Convert CONFIG_PWM_TEGRA to Kconfig

Move this option to Kconfig and clean up the header files. Adjust the only
user (the LCD driver) to work with the new driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Simon Glass 2016-01-30 16:38:00 -07:00 committed by Tom Warren
parent f5acf91f6f
commit 41fa035ce1
17 changed files with 16 additions and 8 deletions

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@ -14,6 +14,7 @@ CONFIG_CMD_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -26,6 +26,7 @@ CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA114_SPI=y
CONFIG_TPM_TIS_INFINEON=y

View File

@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_PWM=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View File

@ -17,3 +17,11 @@ config PWM_ROCKCHIP
programmable period and duty cycle. A 32-bit counter is used.
Various options provided in the hardware (such as capture mode and
continuous/single-shot) are not supported by the driver.
config PWM_TEGRA
bool "Enable support for the Tegra PWM"
help
This PWM is found on Tegra 20 and other Nvidia SoCs. It supports
four channels with a programmable period and duty cycle. Only a
32KHz clock is supported by the driver but the duty cycle is
configurable.

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@ -53,7 +53,6 @@
#define CONFIG_TFTP_TSIZE
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10
#define CONFIG_CMD_BMP

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@ -60,7 +60,6 @@
#define CONFIG_CMD_DHCP
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10

View File

@ -48,7 +48,6 @@
#define CONFIG_CMD_DHCP
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_SYS_WHITE_ON_BLACK
/* support the new (FDT-based) image format */

View File

@ -38,7 +38,6 @@
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_AS3722_POWER
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CMD_BMP

View File

@ -48,7 +48,6 @@
#define CONFIG_CMD_DHCP
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10

View File

@ -66,7 +66,6 @@
#define CONFIG_USB_KEYBOARD
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10

View File

@ -48,7 +48,6 @@
#define CONFIG_CMD_DHCP
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_SYS_WHITE_ON_BLACK
/* support the new (FDT-based) image format */

View File

@ -49,7 +49,6 @@
#define CONFIG_USB_KEYBOARD
/* LCD support */
#define CONFIG_PWM_TEGRA
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10