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PXA: Adapt Voipac PXA270 to OneNAND SPL 

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

V2: Add missing u-boot-spl.lds, convert bitshifts to division,
    convert to spl_onenand_load_image()
This commit is contained in:
Marek Vasut 2011-10-31 14:17:21 +01:00 committed by Albert ARIBAUD
parent 496471df9e
commit 411b9eaf55
5 changed files with 184 additions and 5 deletions
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4
board/vpac270/Makefile
View File

@ -23,7 +23,11 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
ifndef CONFIG_SPL_BUILD
COBJS := vpac270.o
else
COBJS := onenand.o
endif
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

66
board/vpac270/onenand.c Normal file
View File

@ -0,0 +1,66 @@
/*
* Voipac PXA270 OneNAND SPL
*
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <onenand_uboot.h>
extern void pxa_dram_init(void);
void board_init_f(unsigned long unused)
{
extern uint32_t _end;
uint32_t tmp;
asm volatile("mov %0, pc" : "=r"(tmp));
tmp >>= 24;
/* The code runs from OneNAND RAM, copy SPL to SRAM and execute it. */
if (tmp == 0) {
tmp = (uint32_t)&_end - CONFIG_SPL_TEXT_BASE;
onenand_spl_load_image(0, tmp, (void *)CONFIG_SPL_TEXT_BASE);
asm volatile("mov pc, %0" : : "r"(CONFIG_SPL_TEXT_BASE));
}
/* Hereby, the code runs from (S)RAM, copy U-Boot and execute it. */
arch_cpu_init();
pxa_dram_init();
onenand_spl_load_image(CONFIG_SPL_ONENAND_LOAD_ADDR,
CONFIG_SPL_ONENAND_LOAD_SIZE,
(void *)CONFIG_SYS_TEXT_BASE);
asm volatile("mov pc, %0" : : "r"(CONFIG_SYS_TEXT_BASE));
for (;;)
;
}
void __attribute__((noreturn)) hang(void)
{
for (;;)
;
}
void icache_disable(void) {}
void dcache_disable(void) {}

92
board/vpac270/u-boot-spl.lds Normal file
View File

@ -0,0 +1,92 @@
/*
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
* on behalf of DENX Software Engineering GmbH
*
* January 2004 - Changed to support H4 device
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = CONFIG_SPL_TEXT_BASE;
.text.0 :
{
arch/arm/cpu/pxa/start.o (.text*)
board/vpac270/libvpac270.o (.text*)
drivers/mtd/onenand/libonenand.o (.text*)
}
/* Start of the rest of the SPL */
. = CONFIG_SPL_TEXT_BASE + 0x800;
.text.1 :
{
*(.text*)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data)
}
. = ALIGN(4);
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.dynsym : {
__dynsym_start = .;
*(.dynsym)
}
. = ALIGN(0x800);
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
__bss_end__ = .;
}
/DISCARD/ : { *(.bss*) }
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynsym*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.hash*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
}

2
board/vpac270/vpac270.c
View File

@ -57,7 +57,9 @@ struct serial_device *default_serial_console(void)
extern void pxa_dram_init(void);
int dram_init(void)
{
#ifndef CONFIG_ONENAND
pxa_dram_init();
#endif
gd->ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}

25
include/configs/vpac270.h
View File

@ -27,7 +27,17 @@
*/
#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */
#define CONFIG_VPAC270 1 /* Voipac PXA270 board */
#define CONFIG_SYS_TEXT_BASE 0x0
#define CONFIG_SYS_TEXT_BASE 0xa0000000
#ifdef CONFIG_ONENAND
#define CONFIG_SPL
#define CONFIG_SPL_ONENAND_SUPPORT
#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000
#define CONFIG_SPL_ONENAND_LOAD_SIZE \
(512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
#define CONFIG_SPL_TEXT_BASE 0x5c000000
#define CONFIG_SPL_LDSCRIPT "board/vpac270/u-boot-spl.lds"
#endif
/*
* Environment settings
@ -46,12 +56,19 @@
"bootm 0xa4000000; " \
"fi; " \
"bootm 0x60000;"
#define CONFIG_EXTRA_ENV_SETTINGS \
"update_onenand=" \
"onenand erase 0x0 0x80000 ; " \
"onenand write 0xa0000000 0x0 0x80000"
#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
#define CONFIG_TIMESTAMP
#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_LZMA /* LZMA compression support */
#define CONFIG_OF_LIBFDT
/*
* Serial Console Configuration
@ -180,16 +197,14 @@
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
#define CONFIG_SYS_IPL_LOAD_ADDR (0x5c000000)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR \
(PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
/*
* NOR FLASH
*/
#define CONFIG_SYS_MONITOR_BASE 0x0
#define CONFIG_SYS_MONITOR_LEN 0x40000
#define CONFIG_SYS_MONITOR_LEN 0x80000
#define CONFIG_ENV_ADDR \
(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_SIZE 0x4000