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sparc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment 

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
This commit is contained in:
Anton Staaf 2011-10-17 16:46:08 -07:00 committed by Wolfgang Denk
parent 2482e3c836
commit 3c3f8a7f3e
1 changed files with 10 additions and 0 deletions
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arch/sparc/include/asm/cache.h
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@ -28,4 +28,14 @@
#include <linux/config.h>
#include <asm/processor.h>
/*
* If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
* use 32-bytes, the cacheline size for Sparc.
*/
#ifdef CONFIG_SYS_CACHELINE_SIZE
#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
#else
#define ARCH_DMA_MINALIGN 32
#endif
#endif