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rockchip: clk: Support setting ACLK 

Add basic support for setting the ARM clock, since this allows us to run
at maximum speed in U-Boot. Currently only a single speed is supported
(1.8GHz).

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2016-11-13 14:22:13 -07:00
parent aede3acc9c
commit 3a8a42d955
1 changed files with 7 additions and 0 deletions
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7
drivers/clk/rockchip/clk_rk3288.c
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@ -691,6 +691,13 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
switch (clk->id) {
case PLL_APLL:
/* We only support a fixed rate here */
if (rate != 1800000000)
return -EINVAL;
rk3288_clk_configure_cpu(priv->cru, priv->grf);
new_rate = rate;
break;
case CLK_DDR:
new_rate = rkclk_configure_ddr(priv->cru, priv->grf, rate);
break;