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imx: spl: Update NAND bootmode detection bit 

BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Jagan Teki 2017-02-24 15:45:13 +05:30 committed by Stefano Babic
parent cba586b400
commit 20f1471416
1 changed files with 2 additions and 2 deletions
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4
arch/arm/imx-common/spl.c
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@ -63,8 +63,8 @@ u32 spl_boot_device(void)
case 0x6:
case 0x7:
return BOOT_DEVICE_MMC1;
/* NAND Flash: 8.5.2 */
case 0x8 ... 0xf:
/* NAND Flash: 8.5.2, Table 8-10 */
case 0x8:
return BOOT_DEVICE_NAND;
}
return BOOT_DEVICE_NONE;