From 14b386f1dcea93f27a13ed51c68dd99dc59d2a00 Mon Sep 17 00:00:00 2001 From: Holger Hans Peter Freyther Date: Tue, 28 Jun 2016 08:55:55 +0200 Subject: [PATCH] sysmobts: Increase FPGA turn-a-round time to help NAND For the Toshiba NAND chip if both NAND (read) and FPGA CS the time to switch might not be enough. Wait longer as discussed by email. --- board/davinci/sysmobts_v2/sysmobts_v2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/davinci/sysmobts_v2/sysmobts_v2.c b/board/davinci/sysmobts_v2/sysmobts_v2.c index 24d6e0b856..dbea937fa7 100644 --- a/board/davinci/sysmobts_v2/sysmobts_v2.c +++ b/board/davinci/sysmobts_v2/sysmobts_v2.c @@ -38,7 +38,7 @@ #define DAVINCI_AWCCR_VAL (0x000000FF) /* EMIF-A async wait cycle config register value. */ #define DAVINCI_A2CR (0x01E00014) /* EMIF-A CS3 config register. */ #define DAVINCI_A2CR_VAL (0x00430491) /* EMIF-A CS3 value for FPGA. */ -#define DAVINCI_A2CR_VAL8 (0x00630591) /* EMIF-A CS3 value for FPGA. */ +#define DAVINCI_A2CR_VAL8 (0x0063059D) /* EMIF-A CS3 value for FPGA. */ DECLARE_GLOBAL_DATA_PTR;