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mx6: Allow mx6 to access the IPUv3 registers 

Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2012-05-31 07:23:55 +00:00 committed by Anatolij Gustschin
parent 8f47d917c6
commit 05d4df1d8a
3 changed files with 14 additions and 3 deletions
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2
arch/arm/include/asm/arch-mx5/imx-regs.h
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@ -50,8 +50,6 @@
#error "CPU_TYPE not defined"
#endif
#define IPU_CTRL_BASE_ADDR IPU_SOC_BASE_ADDR + IPU_SOC_OFFSET
#define IRAM_SIZE 0x00020000 /* 128 KB */
/*

3
arch/arm/include/asm/arch-mx6/imx-regs.h
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@ -73,6 +73,9 @@
#define MMDC1_ARB_BASE_ADDR 0x80000000
#define MMDC1_ARB_END_ADDR 0xFFFFFFFF
#define IPU_SOC_BASE_ADDR IPU1_ARB_BASE_ADDR
#define IPU_SOC_OFFSET 0x00200000
/* Defines for Blocks connected via AIPS (SkyBlue) */
#define ATZ1_BASE_ADDR AIPS1_ARB_BASE_ADDR
#define ATZ2_BASE_ADDR AIPS2_ARB_BASE_ADDR

12
drivers/video/ipu_regs.h
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@ -47,14 +47,24 @@
#define IPU_SMFC_REG_BASE 0x00050000
#define IPU_DC_REG_BASE 0x00058000
#define IPU_DMFC_REG_BASE 0x00060000
#define IPU_VDI_REG_BASE 0x00680000
#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
#define IPU_CPMEM_REG_BASE 0x01000000
#define IPU_LUT_REG_BASE 0x01020000
#define IPU_SRM_REG_BASE 0x01040000
#define IPU_TPM_REG_BASE 0x01060000
#define IPU_DC_TMPL_REG_BASE 0x01080000
#define IPU_ISP_TBPR_REG_BASE 0x010C0000
#define IPU_VDI_REG_BASE 0x00680000
#elif defined(CONFIG_MX6Q)
#define IPU_CPMEM_REG_BASE 0x00100000
#define IPU_LUT_REG_BASE 0x00120000
#define IPU_SRM_REG_BASE 0x00140000
#define IPU_TPM_REG_BASE 0x00160000
#define IPU_DC_TMPL_REG_BASE 0x00180000
#define IPU_ISP_TBPR_REG_BASE 0x001C0000
#endif
#define IPU_CTRL_BASE_ADDR (IPU_SOC_BASE_ADDR + IPU_SOC_OFFSET)
extern u32 *ipu_dc_tmpl_reg;