2014-10-24 11:13:48 +00:00
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/*
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* Atheros AR933x USB driver initialization
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*
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* Copyright (C) 2014 Mantas Pucka <mantas@8devices.com>
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*
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* SPDX-License-Identifier:GPL-2.0
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*/
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2014-10-21 12:29:11 +00:00
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#include <common.h>
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#include <pci.h>
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#include <usb.h>
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#include <asm/io.h>
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#include <usb/ehci-fsl.h>
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#include <asm/mipsregs.h>
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#include "ar7240_soc.h"
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#include "ehci.h"
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/*
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* Create the appropriate control structures to manage
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* a new EHCI host controller.
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*
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* Excerpts from linux ehci fsl driver.
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*/
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int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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struct usb_ehci *ehci;
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#define AR933X_EHCI_BASE 0x1b000000
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#define AR933X_RESET_USB_HOST BIT(5)
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#define AR933X_RESET_USB_PHY BIT(4)
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#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
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ar7240_reg_wr (AR7240_RESET, (ar7240_reg_rd(AR7240_RESET) | AR933X_RESET_USBSUS_OVERRIDE));
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mdelay(10);
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ar7240_reg_wr (AR7240_RESET, (ar7240_reg_rd(AR7240_RESET) & ~(AR933X_RESET_USB_HOST)));
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mdelay(10);
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ar7240_reg_wr (AR7240_RESET, (ar7240_reg_rd(AR7240_RESET) & ~(AR933X_RESET_USB_PHY)));
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mdelay(10);
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ehci = (struct usb_ehci *)AR933X_EHCI_BASE;
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*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
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*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
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HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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debug("ehci-ar9331: init hccr %x and hcor %x hc_length %d\n",
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(uint32_t)*hccr, (uint32_t)*hcor,
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(uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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return 0;
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}
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/*
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* Destroy the appropriate control structures corresponding
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* the the EHCI host controller.
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*/
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int ehci_hcd_stop(int index)
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{
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return 0;
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}
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