39 lines
1.4 KiB
Diff
39 lines
1.4 KiB
Diff
In IGD, DPCUNIT_CLOCK_GATE_DISABLE bit should be set, otherwise i2c
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access will be wrong.
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Signed-off-by: Shaohua Li <shaohua.li@intel.com>
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---
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drivers/gpu/drm/i915/i915_reg.h | 1 +
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drivers/gpu/drm/i915/intel_display.c | 5 +++++
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2 files changed, 6 insertions(+)
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Index: linux/drivers/gpu/drm/i915/i915_reg.h
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===================================================================
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--- linux.orig/drivers/gpu/drm/i915/i915_reg.h 2009-03-16 14:18:27.000000000 +0800
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+++ linux/drivers/gpu/drm/i915/i915_reg.h 2009-03-16 14:28:09.000000000 +0800
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@@ -523,6 +523,7 @@
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#define DPLLA_INPUT_BUFFER_ENABLE (1 << 0)
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#define D_STATE 0x6104
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#define CG_2D_DIS 0x6200
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+#define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24)
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#define CG_3D_DIS 0x6204
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/*
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Index: linux/drivers/gpu/drm/i915/intel_display.c
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===================================================================
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--- linux.orig/drivers/gpu/drm/i915/intel_display.c 2009-03-16 14:16:11.000000000 +0800
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+++ linux/drivers/gpu/drm/i915/intel_display.c 2009-03-16 14:27:46.000000000 +0800
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@@ -1545,6 +1545,11 @@ static void intel_setup_outputs(struct d
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_connector *connector;
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+ /* When using bit bashing for I2C, this bit needs to be set to 1 */
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+ if (IS_IGD(dev))
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+ I915_WRITE(CG_2D_DIS,
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+ I915_READ(CG_2D_DIS) | DPCUNIT_CLOCK_GATE_DISABLE);
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+
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intel_crt_init(dev);
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/* Set up integrated LVDS */
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