generic-poky/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0081-config-i386-sse.md-Upd...

225 lines
8.9 KiB
Diff

From ac4ab0911ae869e3cd4c00629e3c4d4d0b7e7aa6 Mon Sep 17 00:00:00 2001
From: uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu, 7 Apr 2011 20:46:50 +0000
Subject: [PATCH] * config/i386/sse.md: Update copyright year.
(avx_cmp<ssescalarmodesuffix><mode>3): Add missing output
register constraint.
(*vec_concatv2sf_avx): Fix wrong register constraint in
alternative 3 of operand 1.
(*vec_set<mode>_0_avx): Avoid combining registers from different
units in a single alternative.
(*vec_set<mode>_0_sse4_1): Ditto.
(*vec_set<mode>_0_sse2): Ditto.
(vec_set<mode>_0): Ditto.
(sse2_storehpd): Ditto.
(sse2_loadhpd): Ditto.
(sse4_1_insertps): Use nonimmediate_operand for operand 2.
* config/i386/predicates.md (sse_comparison_operator): Do not
define as special predicate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@172126 138bc75d-0d04-0410-961f-82ee72b054a4
index 986856b..7cce9d4 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -969,13 +969,8 @@
;; Return true if OP is a comparison that can be used in the CMPSS/CMPPS insns.
;; The first set are supported directly; the second set can't be done with
;; full IEEE support, i.e. NaNs.
-;;
-;; ??? It would seem that we have a lot of uses of this predicate that pass
-;; it the wrong mode. We got away with this because the old function didn't
-;; check the mode at all. Mirror that for now by calling this a special
-;; predicate.
-(define_special_predicate "sse_comparison_operator"
+(define_predicate "sse_comparison_operator"
(match_code "eq,lt,le,unordered,ne,unge,ungt,ordered"))
;; Return true if OP is a comparison operator that can be issued by
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index f4bea64..578ad82 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1,5 +1,5 @@
;; GCC machine description for SSE instructions
-;; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010
+;; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011
;; Free Software Foundation, Inc.
;;
;; This file is part of GCC.
@@ -1557,7 +1557,7 @@
(set_attr "mode" "<MODE>")])
(define_insn "avx_cmp<ssescalarmodesuffix><mode>3"
- [(set (match_operand:SSEMODEF2P 0 "register_operand" "")
+ [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x")
(vec_merge:SSEMODEF2P
(unspec:SSEMODEF2P
[(match_operand:SSEMODEF2P 1 "register_operand" "x")
@@ -3846,7 +3846,7 @@
(define_insn "*vec_concatv2sf_avx"
[(set (match_operand:V2SF 0 "register_operand" "=x,x,x,*y ,*y")
(vec_concat:V2SF
- (match_operand:SF 1 "nonimmediate_operand" " x,x,m, x , m")
+ (match_operand:SF 1 "nonimmediate_operand" " x,x,m, 0 , m")
(match_operand:SF 2 "vector_move_operand" " x,m,C,*ym, C")))]
"TARGET_AVX"
"@
@@ -3935,13 +3935,15 @@
DONE;
})
+;; Avoid combining registers from different units in a single alternative,
+;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "*vec_set<mode>_0_avx"
- [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x,x, x,x, x,m")
+ [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x,x, x,x, x,m, m,m")
(vec_merge:SSEMODE4S
(vec_duplicate:SSEMODE4S
(match_operand:<ssescalarmode> 2
- "general_operand" " x,m,*r,x,*rm,x*rfF"))
- (match_operand:SSEMODE4S 1 "vector_move_operand" " C,C, C,x, x,0")
+ "general_operand" " x,m,*r,x,*rm,x,*r,fF"))
+ (match_operand:SSEMODE4S 1 "vector_move_operand" " C,C, C,x, x,0, 0,0")
(const_int 1)))]
"TARGET_AVX"
"@
@@ -3950,20 +3952,24 @@
vmovd\t{%2, %0|%0, %2}
vmovss\t{%2, %1, %0|%0, %1, %2}
vpinsrd\t{$0, %2, %1, %0|%0, %1, %2, 0}
+ #
+ #
#"
- [(set_attr "type" "sselog,ssemov,ssemov,ssemov,sselog,*")
- (set_attr "prefix_extra" "*,*,*,*,1,*")
- (set_attr "length_immediate" "*,*,*,*,1,*")
+ [(set_attr "type" "sselog,ssemov,ssemov,ssemov,sselog,*,*,*")
+ (set_attr "prefix_extra" "*,*,*,*,1,*,*,*")
+ (set_attr "length_immediate" "*,*,*,*,1,*,*,*")
(set_attr "prefix" "vex")
- (set_attr "mode" "SF,<ssescalarmode>,SI,SF,TI,*")])
+ (set_attr "mode" "SF,<ssescalarmode>,SI,SF,TI,*,*,*")])
+;; Avoid combining registers from different units in a single alternative,
+;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "*vec_set<mode>_0_sse4_1"
- [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x,x, x,x, x,m")
+ [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x,x, x,x, x, m,m")
(vec_merge:SSEMODE4S
(vec_duplicate:SSEMODE4S
(match_operand:<ssescalarmode> 2
- "general_operand" " x,m,*r,x,*rm,*rfF"))
- (match_operand:SSEMODE4S 1 "vector_move_operand" " C,C, C,0, 0,0")
+ "general_operand" " x,m,*r,x,*rm,*r,fF"))
+ (match_operand:SSEMODE4S 1 "vector_move_operand" " C,C, C,0, 0, 0,0")
(const_int 1)))]
"TARGET_SSE4_1"
"@
@@ -3972,44 +3978,53 @@
movd\t{%2, %0|%0, %2}
movss\t{%2, %0|%0, %2}
pinsrd\t{$0, %2, %0|%0, %2, 0}
+ #
#"
- [(set_attr "type" "sselog,ssemov,ssemov,ssemov,sselog,*")
- (set_attr "prefix_extra" "*,*,*,*,1,*")
- (set_attr "length_immediate" "*,*,*,*,1,*")
- (set_attr "mode" "SF,<ssescalarmode>,SI,SF,TI,*")])
+ [(set_attr "type" "sselog,ssemov,ssemov,ssemov,sselog,*,*")
+ (set_attr "prefix_extra" "*,*,*,*,1,*,*")
+ (set_attr "length_immediate" "*,*,*,*,1,*,*")
+ (set_attr "mode" "SF,<ssescalarmode>,SI,SF,TI,*,*")])
+;; Avoid combining registers from different units in a single alternative,
+;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "*vec_set<mode>_0_sse2"
- [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x, x,x,m")
+ [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x, x,x,m, m,m")
(vec_merge:SSEMODE4S
(vec_duplicate:SSEMODE4S
(match_operand:<ssescalarmode> 2
- "general_operand" " m,*r,x,x*rfF"))
- (match_operand:SSEMODE4S 1 "vector_move_operand" " C, C,0,0")
+ "general_operand" " m,*r,x,x,*r,fF"))
+ (match_operand:SSEMODE4S 1 "vector_move_operand" " C, C,0,0, 0,0")
(const_int 1)))]
"TARGET_SSE2"
"@
mov<ssescalarmodesuffix>\t{%2, %0|%0, %2}
movd\t{%2, %0|%0, %2}
movss\t{%2, %0|%0, %2}
+ #
+ #
#"
[(set_attr "type" "ssemov")
- (set_attr "mode" "<ssescalarmode>,SI,SF,*")])
+ (set_attr "mode" "<ssescalarmode>,SI,SF,*,*,*")])
+;; Avoid combining registers from different units in a single alternative,
+;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "vec_set<mode>_0"
- [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x,x,m")
+ [(set (match_operand:SSEMODE4S 0 "nonimmediate_operand" "=x,x,m, m,m")
(vec_merge:SSEMODE4S
(vec_duplicate:SSEMODE4S
(match_operand:<ssescalarmode> 2
- "general_operand" " m,x,x*rfF"))
- (match_operand:SSEMODE4S 1 "vector_move_operand" " C,0,0")
+ "general_operand" " m,x,x,*r,fF"))
+ (match_operand:SSEMODE4S 1 "vector_move_operand" " C,0,0, 0,0")
(const_int 1)))]
"TARGET_SSE"
"@
movss\t{%2, %0|%0, %2}
movss\t{%2, %0|%0, %2}
+ #
+ #
#"
[(set_attr "type" "ssemov")
- (set_attr "mode" "SF,SF,*")])
+ (set_attr "mode" "SF,SF,*,*,*")])
;; A subset is vec_setv4sf.
(define_insn "*vec_setv4sf_avx"
@@ -4064,7 +4079,7 @@
(define_insn "sse4_1_insertps"
[(set (match_operand:V4SF 0 "register_operand" "=x")
- (unspec:V4SF [(match_operand:V4SF 2 "register_operand" "x")
+ (unspec:V4SF [(match_operand:V4SF 2 "nonimmediate_operand" "xm")
(match_operand:V4SF 1 "register_operand" "0")
(match_operand:SI 3 "const_0_to_255_operand" "n")]
UNSPEC_INSERTPS))]
@@ -4811,6 +4826,8 @@
(set_attr "prefix" "vex")
(set_attr "mode" "V1DF,V2DF,DF,DF,DF")])
+;; Avoid combining registers from different units in a single alternative,
+;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "sse2_storehpd"
[(set (match_operand:DF 0 "nonimmediate_operand" "=m,x,x,*f,r")
(vec_select:DF
@@ -4912,6 +4929,8 @@
(set_attr "prefix" "vex")
(set_attr "mode" "V1DF,V2DF,DF,DF,DF")])
+;; Avoid combining registers from different units in a single alternative,
+;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "sse2_loadhpd"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,x,o,o,o")
(vec_concat:V2DF
@@ -4983,6 +5002,8 @@
(set_attr "prefix" "vex")
(set_attr "mode" "DF,V1DF,V1DF,V1DF,DF,DF,DF")])
+;; Avoid combining registers from different units in a single alternative,
+;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "sse2_loadlpd"
[(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,x,x,x,m,m,m")
(vec_concat:V2DF
--
1.7.0.4