463 lines
15 KiB
Diff
463 lines
15 KiB
Diff
Index: linux-2.6.33/drivers/hwmon/Kconfig
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===================================================================
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--- linux-2.6.33.orig/drivers/hwmon/Kconfig
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+++ linux-2.6.33/drivers/hwmon/Kconfig
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@@ -63,6 +63,13 @@ config SENSORS_EMC1403
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Threshold values can be configured using sysfs.
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Data from the different diode are accessible via sysfs.
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+config SENSORS_MRST_ANALOG_ACCEL
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+ tristate "Moorestown Analog Accelerometer"
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+ depends on LNW_IPC
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+ help
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+ If you say yes here you get support for the Analog Accelerometer Devices
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+ x y Z data can be accessed via sysfs.
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+
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config HWMON_DEBUG_CHIP
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bool "Hardware Monitoring Chip debugging messages"
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default n
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Index: linux-2.6.33/drivers/hwmon/Makefile
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===================================================================
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--- linux-2.6.33.orig/drivers/hwmon/Makefile
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+++ linux-2.6.33/drivers/hwmon/Makefile
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@@ -103,6 +103,7 @@ obj-$(CONFIG_SENSORS_ISL29020) += isl290
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obj-$(CONFIG_SENSORS_HMC6352) += hmc6352.o
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obj-$(CONFIG_SENSORS_LIS331DL) += lis331dl.o
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obj-$(CONFIG_SENSORS_EMC1403) += emc1403.o
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+obj-$(CONFIG_SENSORS_MRST_ANALOG_ACCEL) += mrst_analog_accel.o
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ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y)
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EXTRA_CFLAGS += -DDEBUG
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Index: linux-2.6.33/drivers/hwmon/mrst_analog_accel.c
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===================================================================
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--- /dev/null
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+++ linux-2.6.33/drivers/hwmon/mrst_analog_accel.c
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@@ -0,0 +1,381 @@
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+/*
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+ * mrst_analog_accel.c - Intel analog accelerometer driver for Moorestown
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+ *
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+ * Copyright (C) 2009 Intel Corp
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+ *
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+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; version 2 of the License.
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+ *
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+ * This program is distributed in the hope that it will be useful, but
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+ * WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ * General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+ *
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/init.h>
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+#include <linux/slab.h>
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+#include <linux/i2c.h>
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+#include <linux/hwmon.h>
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+#include <linux/hwmon-sysfs.h>
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+#include <linux/hwmon-vid.h>
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+#include <linux/err.h>
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+#include <linux/delay.h>
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+#include <asm/ipc_defs.h>
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+
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+MODULE_AUTHOR("Ramesh Agarwal");
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+MODULE_DESCRIPTION("Intel Moorestown Analog Accelerometer Driver");
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+MODULE_LICENSE("GPL v2");
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+
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+/* PMIC ADC INTERRUPT REGISTERS */
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+#define PMIC_ADC_ACC_REG_ADCINT 0x5F /*ADC interrupt register */
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+#define PMIC_ADC_ACC_REG_MADCINT 0x60 /*ADC interrupt mask register */
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+
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+/* PMIC ADC CONTROL REGISTERS */
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+#define PMIC_ADC_ACC_REG_ADCCNTL1 0x61 /*ADC control register */
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+#define PMIC_ADC_ACC_REG_ADCCNTL2 0x62 /*ADC gain regs channel 10-17 */
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+#define PMIC_ADC_ACC_REG_ADCCNTL3 0x63 /*ADC gain regs channel 18-21 */
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+
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+/* PMIC Data Register base */
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+#define PMIC_ADC_DATA_REG_BASE 0x64
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+
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+/* PMIC Channel Mapping Register base */
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+#define PMIC_ADC_MAPPING_BASE 0xA4
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+
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+/* Number of PMIC sample registers */
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+#define PMIC_ADC_REG_MAX 32 /* Max no of available channel */
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+
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+#define PMIC_ADC_X_REG_HIGH(index) (PMIC_ADC_DATA_REG_BASE \
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+ + (index * 2))
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+#define PMIC_ADC_X_REG_LOW(index) (PMIC_ADC_DATA_REG_BASE \
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+ + (index * 2) + 1)
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+#define PMIC_ADC_Y_REG_HIGH(index) (PMIC_ADC_DATA_REG_BASE \
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+ + (index * 2) + 2)
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+#define PMIC_ADC_Y_REG_LOW(index) (PMIC_ADC_DATA_REG_BASE \
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+ + (index * 2) + 3)
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+#define PMIC_ADC_Z_REG_HIGH(index) (PMIC_ADC_DATA_REG_BASE \
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+ + (index * 2) + 4)
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+#define PMIC_ADC_Z_REG_LOW(index) (PMIC_ADC_DATA_REG_BASE \
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+ + (index * 2) + 5)
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+
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+/* Number of registers to read at a time */
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+#define REG_READ_PER_IPC 4 /* Read 4 at a time although the */
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+ /* IPC will support max 5 */
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+
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+#define END_OF_CHANNEL_VALUE 0x1F /* Used to indicate the last */
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+ /* channel being used */
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+
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+/* PMIC ADC channels for Accelero Meter */
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+#define PMIC_ADC_ACC_ADC_ACC_CH14 0xE
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+#define PMIC_ADC_ACC_ADC_ACC_CH15 0xF
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+#define PMIC_ADC_ACC_ADC_ACC_CH16 0x10
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+
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+static unsigned int mrst_analog_reg_idx;
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+
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+/* Use IPC to read the value of the register and display
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+ * X value
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+ */
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+static ssize_t
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+mrst_analog_accel_x_axis_data_show(struct device *dev,
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+ struct device_attribute *attr, char *buf)
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+{
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+ unsigned int ret_val;
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+ struct ipc_pmic_reg_data ipc_data;
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+
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+ ipc_data.ioc = FALSE; /* No need to generate MSI */
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+ ipc_data.num_entries = 2;
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+ ipc_data.pmic_reg_data[0].register_address =
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+ PMIC_ADC_X_REG_HIGH(mrst_analog_reg_idx); /* X Higher 8 bits */
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+ ipc_data.pmic_reg_data[1].register_address =
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+ PMIC_ADC_X_REG_LOW(mrst_analog_reg_idx); /* X lower 3 bits */
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+ if (ipc_pmic_register_read(&ipc_data) != 0) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:PMIC reg read using IPC failed\n");
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+ return -1;
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+ }
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+ ret_val = ipc_data.pmic_reg_data[0].value << 3; /* X higher 8 bits */
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+ /* lower 3 bits */
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+ ret_val = ret_val | (ipc_data.pmic_reg_data[1].value & 0x07);
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+ return sprintf(buf, "%d\n", ret_val);
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+}
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+
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+/* Use IPC to read the value of the register and display
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+ * Y value */
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+static ssize_t
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+mrst_analog_accel_y_axis_data_show(struct device *dev,
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+ struct device_attribute *attr, char *buf)
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+{
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+ unsigned int ret_val;
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+ struct ipc_pmic_reg_data ipc_data;
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+
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+ ipc_data.ioc = FALSE; /* No need to generate MSI */
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+ ipc_data.num_entries = 2;
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+ ipc_data.pmic_reg_data[0].register_address =
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+ PMIC_ADC_Y_REG_HIGH(mrst_analog_reg_idx); /* Y higher 8 bits */
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+ ipc_data.pmic_reg_data[1].register_address =
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+ PMIC_ADC_Y_REG_LOW(mrst_analog_reg_idx); /* Y lower 3 bits */
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+ if (ipc_pmic_register_read(&ipc_data) != 0) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:PMIC reg read using IPC failed\n");
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+ return -1;
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+ }
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+ ret_val = ipc_data.pmic_reg_data[0].value << 3; /* Y higher 8 bits */
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+ /* Y lower 3 bits */
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+ ret_val = ret_val | (ipc_data.pmic_reg_data[1].value & 0x07);
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+ return sprintf(buf, "%d\n", ret_val);
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+}
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+
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+/* Use IPC to read the value of the register and display
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+ * Z value */
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+static ssize_t
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+mrst_analog_accel_z_axis_data_show(struct device *dev,
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+ struct device_attribute *attr, char *buf)
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+{
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+ unsigned int ret_val;
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+ struct ipc_pmic_reg_data ipc_data;
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+
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+ ipc_data.ioc = FALSE; /* No need to generate MSI */
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+ ipc_data.num_entries = 2;
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+ ipc_data.pmic_reg_data[0].register_address =
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+ PMIC_ADC_Z_REG_HIGH(mrst_analog_reg_idx);
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+ ipc_data.pmic_reg_data[1].register_address =
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+ PMIC_ADC_Z_REG_LOW(mrst_analog_reg_idx); /* Z lower 3 bits */
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+ if (ipc_pmic_register_read(&ipc_data) != 0) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:PMIC reg read using IPC failed\n");
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+ return -1;
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+ }
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+ ret_val = ipc_data.pmic_reg_data[0].value << 3; /* Z higher 8 bits */
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+ /* Z lower 3 bits */
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+ ret_val = ret_val | (ipc_data.pmic_reg_data[1].value & 0x07);
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+ return sprintf(buf, "%d\n", ret_val);
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+}
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+
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+
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+static DEVICE_ATTR(acc_x_axis, S_IRUGO,
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+ mrst_analog_accel_x_axis_data_show, NULL);
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+static DEVICE_ATTR(acc_y_axis, S_IRUGO,
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+ mrst_analog_accel_y_axis_data_show, NULL);
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+static DEVICE_ATTR(acc_z_axis, S_IRUGO,
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+ mrst_analog_accel_z_axis_data_show, NULL);
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+
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+static struct attribute *mid_att_acc[] = {
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+ &dev_attr_acc_x_axis.attr,
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+ &dev_attr_acc_y_axis.attr,
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+ &dev_attr_acc_z_axis.attr,
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+ NULL
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+};
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+
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+static struct attribute_group m_analog_gr = {
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+ .name = "mrst_analog_accel",
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+ .attrs = mid_att_acc
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+};
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+
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+static int
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+mrst_analog_accel_initialize(void)
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+{
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+ struct ipc_pmic_mod_reg_data ipc_mod_data;
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+ struct ipc_pmic_reg_data ipc_data;
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+ u8 retval = 0;
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+ u8 mad_cntrl = 0; /* MADCINT register value */
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+ u8 adc_cntrl2 = 0; /* ADCCNTL2 register value */
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+ int i, j;
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+
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+ /* Initialize the register index to use to be zero */
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+ mrst_analog_reg_idx = 0;
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+
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+ /* check if the ADC is enabled or not
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+ * Read ADCCNTL1 registers */
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+ ipc_data.ioc = FALSE; /* No need to generate MSI */
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+ ipc_data.num_entries = 1;
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+ ipc_data.pmic_reg_data[0].register_address =
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+ PMIC_ADC_ACC_REG_ADCCNTL1;
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+ ipc_data.pmic_reg_data[0].value = 0;
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+
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+ retval = ipc_pmic_register_read(&ipc_data);
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+ if (retval != 0) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:PMIC register read failed\n");
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+ return retval;
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+ }
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+
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+ adc_cntrl2 = ipc_data.pmic_reg_data[0].value;
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+
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+ if ((adc_cntrl2 >> 7) & 0x1) {
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+ /* If the ADC is enabled find the set of registers to use
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+ ** Loop through the channel mapping register to find out the
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+ ** first free one
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+ */
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+ for (i = 0;
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+ (i < PMIC_ADC_REG_MAX) && (mrst_analog_reg_idx == 0);
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+ i += REG_READ_PER_IPC) {
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+
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+ ipc_data.num_entries = REG_READ_PER_IPC;
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+ ipc_data.ioc = FALSE; /* No need to generate MSI */
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+
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+ /* Reading 4 regs at a time instead of reading each
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+ * reg one by one since IPC is an expensive operation
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+ */
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+ for (j = 0; j < REG_READ_PER_IPC; j++) {
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+ ipc_data.pmic_reg_data[j].register_address =
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+ PMIC_ADC_MAPPING_BASE + i + j;
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+ ipc_data.pmic_reg_data[j].value = 0;
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+ }
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+ retval = ipc_pmic_register_read(&ipc_data);
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+ if (retval != 0) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:PMIC regs read failed\n");
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+ return retval;
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+ }
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+ for (j = 0; j < REG_READ_PER_IPC; j++) {
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+ if (ipc_data.pmic_reg_data[j].value
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+ == END_OF_CHANNEL_VALUE) {
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+ mrst_analog_reg_idx = i + j;
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+ break;
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+ }
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+ }
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+ }
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+ }
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+ /* Check to see if there are enough registers to map the channel */
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+ if ((mrst_analog_reg_idx + 3) >= PMIC_ADC_REG_MAX) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:Not enough regs to map the channels\n");
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+ return -1;
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+ }
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+
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+ /* Update the mapping registers for the accelerometer*/
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+ ipc_data.num_entries = 4;
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+ ipc_data.ioc = FALSE; /* No need to generate MSI */
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+ ipc_data.pmic_reg_data[0].register_address =
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+ PMIC_ADC_MAPPING_BASE + mrst_analog_reg_idx;
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+ ipc_data.pmic_reg_data[0].value = PMIC_ADC_ACC_ADC_ACC_CH14;
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+
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+ ipc_data.pmic_reg_data[1].register_address =
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+ PMIC_ADC_MAPPING_BASE + mrst_analog_reg_idx + 1;
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+ ipc_data.pmic_reg_data[1].value = PMIC_ADC_ACC_ADC_ACC_CH15;
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+
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+ ipc_data.pmic_reg_data[2].register_address =
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+ PMIC_ADC_MAPPING_BASE + mrst_analog_reg_idx + 2;
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+ ipc_data.pmic_reg_data[2].value = PMIC_ADC_ACC_ADC_ACC_CH16;
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+
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+ ipc_data.pmic_reg_data[3].register_address =
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+ PMIC_ADC_MAPPING_BASE + mrst_analog_reg_idx + 3 ;
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+ ipc_data.pmic_reg_data[3].value = END_OF_CHANNEL_VALUE;
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+
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+ retval = ipc_pmic_register_write(&ipc_data, FALSE);
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+ if (retval != 0) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:PMIC reg write failed\n");
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+ return retval;
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+ }
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+
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+ /* If the ADC was not enabled, enable it now */
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+ if (!(adc_cntrl2 >> 7) & 0x1) {
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+ /* Mask the round robin completion interrupt */
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+ ipc_mod_data.ioc = FALSE; /* No need to generate MSI */
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+ ipc_mod_data.num_entries = 1;
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+ mad_cntrl = 0x01;
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+ ipc_mod_data.pmic_mod_reg_data[0].register_address =
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+ PMIC_ADC_ACC_REG_MADCINT;
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+ ipc_mod_data.pmic_mod_reg_data[0].value = mad_cntrl;
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+ ipc_mod_data.pmic_mod_reg_data[0].bit_map = 0x01;
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+
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+ retval = ipc_pmic_register_read_modify(&ipc_mod_data);
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+ if (retval != 0) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:PMIC reg modify failed\n");
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+ return retval;
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+ }
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+
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+ adc_cntrl2 = 0xc6; /*27ms delay,start round robin,
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+ enable full power */
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+ ipc_data.ioc = FALSE; /* No need to generate MSI */
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+ ipc_data.num_entries = 1;
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+ ipc_data.pmic_reg_data[0].register_address =
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+ PMIC_ADC_ACC_REG_ADCCNTL1;
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+ ipc_data.pmic_reg_data[0].value = adc_cntrl2;
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+ retval = ipc_pmic_register_write(&ipc_data, FALSE);
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+ if (retval != 0)
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+ return retval;
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+ }
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+ return retval;
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+}
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+
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+static struct platform_device *mrst_analog_accel_pdev;
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+static struct device *mrst_analog_accel_hwmon;
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+
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+static int
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+mrst_analog_accel_unregister(void)
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+{
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+
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+ printk(KERN_ALERT "\nStart Exit\n\n");
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+ sysfs_remove_group(&mrst_analog_accel_hwmon->kobj, &m_analog_gr);
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+ hwmon_device_unregister(mrst_analog_accel_hwmon);
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+ platform_device_unregister(mrst_analog_accel_pdev);
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+ printk(KERN_ALERT "\n\nEnd Exit\n");
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+ return 0;
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+}
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+
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+
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+static int __init
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+mrst_analog_accel_module_init(void)
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+{
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+ int retval = 0;
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+
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+ mrst_analog_accel_pdev =
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+ platform_device_register_simple("mrst_analog_accel",
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+ 0, NULL, 0);
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+ if (IS_ERR(mrst_analog_accel_pdev)) {
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+ retval = PTR_ERR(mrst_analog_accel_pdev);
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:Registration with the platform failed\n");
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+ goto accelero_reg_failed;
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+ }
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:Registered with the platform\n");
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+
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+ retval = mrst_analog_accel_initialize();
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+ if (retval == 0) {
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+ retval = sysfs_create_group(&mrst_analog_accel_pdev->dev.kobj,
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+ &m_analog_gr);
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+ if (retval) {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:device_create_file 1 failed\n");
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+ goto accelero_reg_failed;
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+ }
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+ mrst_analog_accel_hwmon =
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+ hwmon_device_register(&mrst_analog_accel_pdev->dev);
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+ if (IS_ERR(mrst_analog_accel_hwmon)) {
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+ retval = PTR_ERR(mrst_analog_accel_hwmon);
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+ mrst_analog_accel_hwmon = NULL;
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:Registration with hwmon failed\n");
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+ }
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+ } else {
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+ printk(KERN_ALERT
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+ "\nmrst_analog_accel:Initialization failed: %d\n", retval);
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+ }
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+
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+accelero_reg_failed:
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+ return retval;
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+}
|
|
+
|
|
+static void __exit
|
|
+mrst_analog_accel_module_exit(void)
|
|
+{
|
|
+
|
|
+ mrst_analog_accel_unregister();
|
|
+}
|
|
+
|
|
+module_init(mrst_analog_accel_module_init);
|
|
+module_exit(mrst_analog_accel_module_exit);
|
|
Index: linux-2.6.33/drivers/hwmon/lis331dl.c
|
|
===================================================================
|
|
--- linux-2.6.33.orig/drivers/hwmon/lis331dl.c
|
|
+++ linux-2.6.33/drivers/hwmon/lis331dl.c
|
|
@@ -186,33 +186,10 @@ invarg:
|
|
return -EINVAL;
|
|
}
|
|
|
|
-static ssize_t reboot_mem_store(struct device *dev,
|
|
- struct device_attribute *attr, const char *buf, size_t count)
|
|
-{
|
|
- struct i2c_client *client = to_i2c_client(dev);
|
|
- struct acclero_data *data = i2c_get_clientdata(client);
|
|
- unsigned int ret_val, set_val;
|
|
- unsigned long val;
|
|
-
|
|
- if (strict_strtoul(buf, 10, &val))
|
|
- return -EINVAL;
|
|
- ret_val = i2c_smbus_read_byte_data(client, 0x21);
|
|
- if (val == ACCEL_MEMORY_REBOOT) {
|
|
- mutex_lock(&data->update_lock);
|
|
- set_val = (ret_val | (1 << 6)); /* setting the 6th bit */
|
|
- i2c_write_current_data(client, 0x21, set_val);
|
|
- mutex_unlock(&data->update_lock);
|
|
- } else
|
|
- return -EINVAL;
|
|
- return count;
|
|
-}
|
|
-
|
|
static DEVICE_ATTR(data_rate, S_IRUGO | S_IWUSR,
|
|
data_rate_show, data_rate_store);
|
|
static DEVICE_ATTR(power_state, S_IRUGO | S_IWUSR,
|
|
power_mode_show, power_mode_store);
|
|
-static DEVICE_ATTR(reboot_mem, S_IWUSR, NULL,
|
|
- reboot_mem_store);
|
|
static DEVICE_ATTR(x, S_IRUGO, x_pos_show, NULL);
|
|
static DEVICE_ATTR(y, S_IRUGO, y_pos_show, NULL);
|
|
static DEVICE_ATTR(z, S_IRUGO, z_pos_show, NULL);
|
|
@@ -221,7 +198,6 @@ static DEVICE_ATTR(curr_pos, S_IRUGO, xy
|
|
static struct attribute *mid_att_acclero[] = {
|
|
&dev_attr_data_rate.attr,
|
|
&dev_attr_power_state.attr,
|
|
- &dev_attr_reboot_mem.attr,
|
|
&dev_attr_x.attr,
|
|
&dev_attr_y.attr,
|
|
&dev_attr_z.attr,
|