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import dsp/fpga firmware and API headere version 2.4

master
Harald Welte 9 years ago
parent
commit
f7779df33c
  1. 64
      api/superfemto.h
  2. BIN
      firmware/sysmobts-v2.bit
  3. BIN
      firmware/sysmobts-v2.out

64
api/superfemto.h

@ -180,19 +180,15 @@ typedef struct SuperFemto_ActivateRfReq
uint8_t u8UsePdtchMsgq; ///< Set to '1' to use a separate MSGQUEUE for PDTCH primitives
} msgq;
// TRX RF clock options
// RF options
struct
{
int iClkCor; ///< Clock correction value in PPB.
SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:RX, 7:Edge)
} rfTrx;
// RX RF clock options
struct
{
int iClkCor; ///< Clock calibration value in PPB.
SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:TRX, 6:reserved, 7:Edge)
} rfRx;
float fMaxTxPower; ///< Nominal maximum TX power in dBm
uint8_t u8UseExtAtten; ///< Use the external attenuator to control TX power (0:No, 1:Yes)
} rfTrx;
} SuperFemto_ActivateRfReq_t;
@ -313,20 +309,13 @@ typedef struct FemtoBts_RfClockSetupReq
***************************************************************************/
typedef struct SuperFemto_RfClockSetupReq
{
// TRX RF clock options
// RF clock options
struct
{
int iClkCor; ///< Clock correction value in PPB.
SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:RX, 7:Edge)
} rfTrx;
// RX RF clock options
struct
{
int iClkCor; ///< Clock calibration value in PPB.
SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:TRX, 6:reserved, 7:Edge)
} rfRx;
// RF clock calibration
struct {
SuperFemto_ClkSrcId_t clkSrc; ///< Reference clock source (0:Off, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:reserved, 7:Edge, 8:NL)
@ -385,19 +374,12 @@ typedef struct FemtoBts_RfClockInfoCnf
***************************************************************************/
typedef struct SuperFemto_RfClockInfoCnf
{
// TRX RF clock options
// RF clock options
struct
{
int iClkCor; ///< Clock correction value in PPB.
SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:RX, 7:Edge)
} rfTrx;
// RX RF clock options
struct
{
int iClkCor; ///< Clock calibration value in PPB.
SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:TRX, 6:reserved, 7:Edge)
} rfRx;
// RF clock calibration
struct {
@ -470,12 +452,14 @@ typedef struct SuperFemto_GetTxCalibTblCnf
GsmL1_Status_t status;
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
float fGain[80]; ///< Gain setting for output level from +50dBm to -29 dBm
float fGainCorrVsArfcn[374]; /**< Gain correction (in dBm) for each ARFCN
float fTxGainGmsk[80]; ///< Gain setting for GMSK output level from +50dBm to -29 dBm
float fTx8PskCorr; ///< Gain adjustment for 8 PSK (default to +3.25 dB)
float fTxExtAttCorr[31]; ///< Gain adjustment for external attenuator (0:@1dB, 1:@2dB, ..., 31:@32dB)
float fTxRollOffCorr[374]; /**< Gain correction for each ARFCN
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
} SuperFemto_GetTxCalibTblCnf_t;
/****************************************************************************
@ -493,12 +477,14 @@ typedef struct SuperFemto_SetTxCalibTblReq
{
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
float fGain[80]; ///< Gain setting for output level from +50dBm to -29 dBm
float fGainCorrVsArfcn[374]; /***< Gain correction (in dBm) for each ARFCN
float fTxGainGmsk[80]; ///< Gain setting for GMSK output level from +50dBm to -29 dBm
float fTx8PskCorr; ///< Gain adjustment for 8 PSK (default to +3.25 dB)
float fTxExtAttCorr[31]; ///< Gain adjustment for external attenuator (0:@1dB, 1:@2dB, ..., 31:@32dB)
float fTxRollOffCorr[374]; /**< Gain correction for each ARFCN
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
} SuperFemto_SetTxCalibTblReq_t;
/****************************************************************************
@ -547,13 +533,18 @@ typedef struct SuperFemto_GetRxCalibTblCnf
{
GsmL1_Status_t status;
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
uint8_t bUplink; ///< Direction (0:Downlink, 1:Uplink)
float fRssiCorrVsArfcn[374]; /***< RSSI correction (in dBm) for each ARFCN
uint8_t bUplink; ///< Direction (0:Downlink, 1:Uplink)
float fExtRxGain; ///< External RX gain
float fRxMixGainCorr; ///< Mixer gain error compensation
float fRxLnaGainCorr[3]; ///< LNA gain error compensation (1:@-12 dB, 2:@-24 dB, 3:@-36 dB)
float fRxRollOffCorr[374]; /***< Frequency roll-off compensation
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
uint8_t u8IqImbalMode; ///< IQ imbalance mode (0:off, 1:on, 2:auto)
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
} SuperFemto_GetRxCalibTblCnf_t;
/****************************************************************************
@ -572,11 +563,16 @@ typedef struct SuperFemto_SetRxCalibTblReq
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
uint8_t bUplink; ///< Direction (0:Downlink, 1:Uplink)
float fRssiCorrVsArfcn[374]; /***< RSSI correction (in dBm) for each ARFCN
float fExtRxGain; ///< External RX gain
float fRxMixGainCorr; ///< Mixer gain error compensation
float fRxLnaGainCorr[3]; ///< LNA gain error compensation (1:@-12 dB, 2:@-24 dB, 3:@-36 dB)
float fRxRollOffCorr[374]; /***< Frequency roll-off compensation
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
uint8_t u8IqImbalMode; ///< IQ imbalance mode (0:off, 1:on, 2:auto)
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
} SuperFemto_SetRxCalibTblReq_t;
/****************************************************************************

BIN
firmware/sysmobts-v2.bit

BIN
firmware/sysmobts-v2.out

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